EmbeddedPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / EmbeddedPkg / Include / Protocol / MmcHost.h

diff --git a/EmbeddedPkg/Include/Protocol/MmcHost.h b/EmbeddedPkg/Include/Protocol/MmcHost.h
index 21112cc3dd8b46a9c12c2bdd8dca06019cbdb135..9e070826805bbae0ee461bc5d4887348539e8f09 100644 (file)
--- a/EmbeddedPkg/Include/Protocol/MmcHost.h
+++ b/EmbeddedPkg/Include/Protocol/MmcHost.h
@@ -1,15 +1,9 @@
 /** @file\r
   Definition of the MMC Host Protocol\r
 \r
-  Copyright (c) 2011, ARM Limited. All rights reserved.\r
-  \r
-  This program and the accompanying materials                          \r
-  are licensed and made available under the terms and conditions of the BSD License         \r
-  which accompanies this distribution.  The full text of the license may be found at        \r
-  http://opensource.org/licenses/bsd-license.php                                            \r
+  Copyright (c) 2011-2014, ARM Limited. All rights reserved.\r
 \r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -49,6 +43,7 @@ typedef UINT32 MMC_CMD;
 #define MMC_CMD2              (MMC_INDX(2) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)\r
 #define MMC_CMD3              (MMC_INDX(3) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD5              (MMC_INDX(5) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)\r
+#define MMC_CMD6              (MMC_INDX(6) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD7              (MMC_INDX(7) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD8              (MMC_INDX(8) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD9              (MMC_INDX(9) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_LONG_RESPONSE)\r
@@ -61,8 +56,16 @@ typedef UINT32 MMC_CMD;
 #define MMC_CMD20             (MMC_INDX(20) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD23             (MMC_INDX(23) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD24             (MMC_INDX(24) | MMC_CMD_WAIT_RESPONSE)\r
+#define MMC_CMD25             (MMC_INDX(25) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_CMD55             (MMC_INDX(55) | MMC_CMD_WAIT_RESPONSE)\r
 #define MMC_ACMD41            (MMC_INDX(41) | MMC_CMD_WAIT_RESPONSE | MMC_CMD_NO_CRC_RESPONSE)\r
+#define MMC_ACMD51            (MMC_INDX(51) | MMC_CMD_WAIT_RESPONSE)\r
+\r
+// Valid responses for CMD1 in eMMC\r
+#define EMMC_CMD1_CAPACITY_LESS_THAN_2GB 0x00FF8080 // Capacity <= 2GB, byte addressing used\r
+#define EMMC_CMD1_CAPACITY_GREATER_THAN_2GB 0x40FF8080 // Capacity > 2GB, 512-byte sector addressing used\r
+\r
+#define MMC_STATUS_APP_CMD    (1 << 5)\r
 \r
 typedef enum _MMC_STATE {\r
     MmcInvalidState = 0,\r
@@ -78,6 +81,16 @@ typedef enum _MMC_STATE {
     MmcDisconnectState,\r
 } MMC_STATE;\r
 \r
+#define EMMCBACKWARD         (0)\r
+#define EMMCHS26             (1 << 0)      // High-Speed @26MHz at rated device voltages\r
+#define EMMCHS52             (1 << 1)      // High-Speed @52MHz at rated device voltages\r
+#define EMMCHS52DDR1V8       (1 << 2)      // High-Speed Dual Data Rate @52MHz 1.8V or 3V I/O\r
+#define EMMCHS52DDR1V2       (1 << 3)      // High-Speed Dual Data Rate @52MHz 1.2V I/O\r
+#define EMMCHS200SDR1V8      (1 << 4)      // HS200 Single Data Rate @200MHz 1.8V I/O\r
+#define EMMCHS200SDR1V2      (1 << 5)      // HS200 Single Data Rate @200MHz 1.2V I/O\r
+#define EMMCHS400DDR1V8      (1 << 6)      // HS400 Dual Data Rate @400MHz 1.8V I/O\r
+#define EMMCHS400DDR1V2      (1 << 7)      // HS400 Dual Data Rate @400MHz 1.2V I/O\r
+\r
 ///\r
 /// Forward declaration for EFI_MMC_HOST_PROTOCOL\r
 ///\r
@@ -127,8 +140,18 @@ typedef EFI_STATUS (EFIAPI *MMC_WRITEBLOCKDATA) (
   IN  UINT32                    *Buffer\r
   );\r
 \r
+typedef EFI_STATUS (EFIAPI *MMC_SETIOS) (\r
+  IN  EFI_MMC_HOST_PROTOCOL     *This,\r
+  IN  UINT32                    BusClockFreq,\r
+  IN  UINT32                    BusWidth,\r
+  IN  UINT32                    TimingMode\r
+  );\r
 \r
-typedef struct _EFI_MMC_HOST_PROTOCOL {\r
+typedef BOOLEAN (EFIAPI *MMC_ISMULTIBLOCK) (\r
+  IN  EFI_MMC_HOST_PROTOCOL     *This\r
+  );\r
+\r
+struct _EFI_MMC_HOST_PROTOCOL {\r
 \r
   UINT32                  Revision;\r
   MMC_ISCARDPRESENT       IsCardPresent;\r
@@ -143,9 +166,17 @@ typedef struct _EFI_MMC_HOST_PROTOCOL {
   MMC_READBLOCKDATA       ReadBlockData;\r
   MMC_WRITEBLOCKDATA      WriteBlockData;\r
 \r
-} EFI_MMC_HOST_PROTOCOL;\r
+  MMC_SETIOS              SetIos;\r
+  MMC_ISMULTIBLOCK        IsMultiBlock;\r
+\r
+};\r
+\r
+#define MMC_HOST_PROTOCOL_REVISION    0x00010002    // 1.2\r
 \r
-#define MMC_HOST_PROTOCOL_REVISION    0x00010001    // 1.1\r
+#define MMC_HOST_HAS_SETIOS(Host)     (Host->Revision >= MMC_HOST_PROTOCOL_REVISION && \\r
+                                       Host->SetIos != NULL)\r
+#define MMC_HOST_HAS_ISMULTIBLOCK(Host) (Host->Revision >= MMC_HOST_PROTOCOL_REVISION && \\r
+                                         Host->IsMultiBlock != NULL)\r
 \r
 extern EFI_GUID gEfiMmcHostProtocolGuid;\r
 \r