}\r
\r
/**\r
- Perform CPU specific actions required to migrate the PEI Services Table \r
+ Perform CPU specific actions required to migrate the PEI Services Table\r
pointer from temporary RAM to permanent RAM.\r
\r
- For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes \r
+ For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes\r
immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
- For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes \r
+ For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes\r
immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r
- a dedicated CPU register. This means that there is no memory storage \r
- associated with storing the PEI Services Table pointer, so no additional \r
+ a dedicated CPU register. This means that there is no memory storage\r
+ associated with storing the PEI Services Table pointer, so no additional\r
migration actions are required for Itanium or ARM CPUs.\r
\r
**/\r
)\r
{\r
//\r
- // PEI Services Table pointer is cached in the global variable. No additional \r
+ // PEI Services Table pointer is cached in the global variable. No additional\r
// migration actions are required.\r
//\r
return;\r