EmulatorPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / EmulatorPkg / Library / PeiServicesTablePointerLibMagicPage / PeiServicesTablePointer.c

diff --git a/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c
index 4b4db5cafe93f9b3247f309a25d80655df550fd6..9d6e1dfd8a65d3e9cd1cb0bc5873d2cd2a9bedc5 100644 (file)
--- a/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c
+++ b/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c
@@ -1,19 +1,13 @@
 /** @file\r
   PEI Services Table Pointer Library.\r
-  \r
+\r
   Store PEI Services Table pointer via gEmulatorPkgTokenSpaceGuid.PcdPeiServicesTablePage.\r
   This emulates a platform SRAM. The PI mechaism does not work in the emulator due to\r
   lack of privledge.\r
 \r
   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
-  Portiions copyrigth (c) 2011, Apple Inc. All rights reserved. \r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php.\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  Portiions copyrigth (c) 2011, Apple Inc. All rights reserved.\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -24,14 +18,14 @@
 \r
 \r
 /**\r
-  Caches a pointer PEI Services Table. \r
- \r
-  Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer \r
-  in a CPU specific manner as specified in the CPU binding section of the Platform Initialization \r
-  Pre-EFI Initialization Core Interface Specification. \r
-  \r
+  Caches a pointer PEI Services Table.\r
+\r
+  Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer\r
+  in a CPU specific manner as specified in the CPU binding section of the Platform Initialization\r
+  Pre-EFI Initialization Core Interface Specification.\r
+\r
   If PeiServicesTablePointer is NULL, then ASSERT().\r
-  \r
+\r
   @param    PeiServicesTablePointer   The address of PeiServices pointer.\r
 **/\r
 VOID\r
@@ -48,10 +42,10 @@ SetPeiServicesTablePointer (
 /**\r
   Retrieves the cached value of the PEI Services Table pointer.\r
 \r
-  Returns the cached value of the PEI Services Table pointer in a CPU specific manner \r
-  as specified in the CPU binding section of the Platform Initialization Pre-EFI \r
+  Returns the cached value of the PEI Services Table pointer in a CPU specific manner\r
+  as specified in the CPU binding section of the Platform Initialization Pre-EFI\r
   Initialization Core Interface Specification.\r
-  \r
+\r
   If the cached PEI Services Table pointer is NULL, then ASSERT().\r
 \r
   @return  The pointer to PeiServices.\r
@@ -64,12 +58,38 @@ GetPeiServicesTablePointer (
   )\r
 {\r
   CONST EFI_PEI_SERVICES **PeiServicesTablePointer;\r
-  \r
+\r
   PeiServicesTablePointer = EMU_MAGIC_PAGE()->PeiServicesTablePointer;\r
   ASSERT (PeiServicesTablePointer != NULL);\r
   ASSERT (*PeiServicesTablePointer != NULL);\r
   return PeiServicesTablePointer;\r
 }\r
 \r
+/**\r
+  Perform CPU specific actions required to migrate the PEI Services Table\r
+  pointer from temporary RAM to permanent RAM.\r
+\r
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes\r
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes\r
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.\r
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in\r
+  a dedicated CPU register.  This means that there is no memory storage\r
+  associated with storing the PEI Services Table pointer, so no additional\r
+  migration actions are required for Itanium or ARM CPUs.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+MigratePeiServicesTablePointer (\r
+  VOID\r
+  )\r
+{\r
+  //\r
+  //  PEI Services Table pointer is cached in SRAM. No additional\r
+  //  migration actions are required.\r
+  //\r
+  return;\r
+}\r
 \r
 \r