+++ /dev/null
-/** @file\r
- This PPI provides the super I/O register access functionality.\r
-\r
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
- @par Revision Reference:\r
- This PPI is from PI Version 1.2.1.\r
-\r
-**/\r
-\r
-#ifndef __EFI_SUPER_IO_PPI_H__\r
-#define __EFI_SUPER_IO_PPI_H__\r
-\r
-#include <Protocol/SuperIo.h>\r
-\r
-#define EFI_SIO_PPI_GUID \\r
- { \\r
- 0x23a464ad, 0xcb83, 0x48b8, {0x94, 0xab, 0x1a, 0x6f, 0xef, 0xcf, 0xe5, 0x22} \\r
- }\r
-\r
-typedef struct _EFI_SIO_PPI EFI_SIO_PPI;\r
-typedef struct _EFI_SIO_PPI *PEFI_SIO_PPI;\r
-\r
-typedef UINT16 EFI_SIO_REGISTER;\r
-#define EFI_SIO_REG(ldn,reg) (EFI_SIO_REGISTER) (((ldn) << 8) | reg)\r
-#define EFI_SIO_LDN_GLOBAL 0xFF\r
-\r
-/**\r
- Read a Super I/O register.\r
- \r
- The register is specified as an 8-bit logical device number and an 8-bit\r
- register value. The logical device numbers for specific SIO devices can be\r
- determined using the Info member of the PPI structure.\r
- \r
- @param This A pointer to this instance of the EFI_SIO_PPI.\r
- @param ExitCfgMode A boolean specifying whether the driver should turn on\r
- configuration mode (FALSE) or turn off configuration mode\r
- (TRUE) after completing the read operation. The driver must\r
- track the current state of the configuration mode (if any)\r
- and turn on configuration mode (if necessary) prior to\r
- register access.\r
- @param Register A value specifying the logical device number (bits 15:8) \r
- and the register to read (bits 7:0). The logical device \r
- number of EFI_SIO_LDN_GLOBAL indicates that global\r
- registers will be used.\r
- @param IoData A pointer to the returned register value.\r
-\r
- @retval EFI_SUCCESS Success.\r
- @regval EFI_TIMEOUT The register could not be read in the a reasonable\r
- amount of time. The exact time is device-specific.\r
- @retval EFI_INVALID_PARAMETERS Register was out of range for this device.\r
- @retval EFI_INVALID_PARAMETERS IoData was NULL\r
- @retval EFI_DEVICE_ERROR There was a device fault or the device was not present.\r
-**/\r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_PEI_SIO_REGISTER_READ)(\r
- IN CONST EFI_SIO_PPI *This,\r
- IN BOOLEAN ExitCfgMode,\r
- IN EFI_SIO_REGISTER Register,\r
- OUT UINT8 *IoData\r
- );\r
-\r
-/**\r
- Write a Super I/O register.\r
-\r
- The register is specified as an 8-bit logical device number and an 8-bit register\r
- value. The logical device numbers for specific SIO devices can be determined\r
- using the Info member of the PPI structure.\r
-\r
- @param This A pointer to this instance of the EFI_SIO_PPI.\r
- @param ExitCfgMode A boolean specifying whether the driver should turn on\r
- configuration mode (FALSE) or turn off configuration mode\r
- (TRUE) after completing the read operation. The driver must\r
- track the current state of the configuration mode (if any)\r
- and turn on configuration mode (if necessary) prior to\r
- register access.\r
- @param Register A value specifying the logical device number (bits 15:8) \r
- and the register to read (bits 7:0). The logical device \r
- number of EFI_SIO_LDN_GLOBAL indicates that global\r
- registers will be used.\r
- @param IoData A pointer to the returned register value.\r
-\r
- @retval EFI_SUCCESS Success.\r
- @regval EFI_TIMEOUT The register could not be read in the a reasonable\r
- amount of time. The exact time is device-specific.\r
- @retval EFI_INVALID_PARAMETERS Register was out of range for this device.\r
- @retval EFI_INVALID_PARAMETERS IoData was NULL\r
- @retval EFI_DEVICE_ERROR There was a device fault or the device was not present.\r
-**/ \r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_PEI_SIO_REGISTER_WRITE)(\r
- IN CONST EFI_SIO_PPI *This,\r
- IN BOOLEAN ExitCfgMode,\r
- IN EFI_SIO_REGISTER Register,\r
- IN UINT8 IoData\r
- );\r
-\r
-/**\r
- Provides an interface for a table based programming of the Super I/O registers.\r
-\r
- The Modify() function provides an interface for table based programming of the\r
- Super I/O registers. This function can be used to perform programming of\r
- multiple Super I/O registers with a single function call. For each table entry,\r
- the Register is read, its content is bitwise ANDed with AndMask, and then ORed\r
- with OrMask before being written back to the Register. The Super I/O driver\r
- must track the current state of the Super I/O and enable the configuration mode\r
- of Super I/O if necessary prior to table processing. Once the table is processed,\r
- the Super I/O device must be returned to the original state.\r
- \r
- @param This A pointer to this instance of the EFI_SIO_PPI.\r
- @param Command A pointer to an array of NumberOfCommands EFI_SIO_REGISTER_MODIFY\r
- structures. Each structure specifies a single Super I/O register\r
- modify operation.\r
- @param NumberOfCommands The number of elements in the Command array.\r
-\r
- @retval EFI_SUCCESS The operation completed successfully.\r
- @retval EFI_INVALID_PARAMETERS Command is NULL.\r
-**/ \r
-typedef\r
-EFI_STATUS\r
-(EFIAPI *EFI_PEI_SIO_REGISTER_MODIFY)(\r
- IN CONST EFI_SIO_PPI *This,\r
- IN CONST EFI_SIO_REGISTER_MODIFY *Command,\r
- IN UINTN NumberOfCommands\r
- );\r
-\r
-///\r
-/// Specifies the end of the information list.\r
-///\r
-#define EFI_ACPI_PNP_HID_END 0\r
-\r
-typedef UINT32 EFI_ACPI_HID;\r
-typedef UINT32 EFI_ACPI_UID;\r
-#pragma pack(1)\r
-typedef struct _EFI_SIO_INFO {\r
- EFI_ACPI_HID Hid;\r
- EFI_ACPI_UID Uid;\r
- UINT8 Ldn;\r
-} EFI_SIO_INFO, *PEFI_SIO_INFO;\r
-#pragma pack()\r
-\r
-///\r
-/// This PPI provides low-level access to Super I/O registers using Read() and\r
-/// Write(). It also uniquely identifies this Super I/O controller using a GUID\r
-/// and provides mappings between ACPI style PNP IDs and the logical device numbers.\r
-/// There is one instance of this PPI per Super I/O device.\r
-///\r
-struct _EFI_SIO_PPI {\r
- ///\r
- /// This function reads a register's value from the Super I/O controller.\r
- ///\r
- EFI_PEI_SIO_REGISTER_READ Read;\r
- ///\r
- /// This function writes a value to a register in the Super I/O controller.\r
- ///\r
- EFI_PEI_SIO_REGISTER_WRITE Write;\r
- ///\r
- /// This function modifies zero or more registers in the Super I/O controller\r
- /// using a table.\r
- ///\r
- EFI_PEI_SIO_REGISTER_MODIFY Modify;\r
- ///\r
- /// This GUID uniquely identifies the Super I/O controller.\r
- ///\r
- EFI_GUID SioGuid;\r
- ///\r
- /// This pointer is to an array which maps EISA identifiers to logical devices numbers.\r
- ///\r
- PEFI_SIO_INFO Info;\r
-};\r
-\r
-extern EFI_GUID gEfiSioPpiGuid;\r
-\r
-#endif \r
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