Add PciBus & IdeBus

[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBus / Dxe / PciCommand.h

diff --git a/IntelFrameworkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h b/IntelFrameworkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h
new file mode 100644 (file)
index 0000000..e63d0d1
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+++ b/IntelFrameworkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h
@@ -0,0 +1,175 @@
+/*++\r
+\r
+Copyright (c) 2006, Intel Corporation                                                         \r
+All rights reserved. This program and the accompanying materials                          \r
+are licensed and made available under the terms and conditions of the BSD License         \r
+which accompanies this distribution.  The full text of the license may be found at        \r
+http://opensource.org/licenses/bsd-license.php                                            \r
+                                                                                          \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+\r
+Module Name:\r
+  \r
+    PciCommand.h\r
+  \r
+Abstract:\r
+\r
+  PCI Bus Driver\r
+\r
+Revision History\r
+\r
+--*/\r
+\r
+#ifndef _EFI_PCI_COMMAND_H\r
+#define _EFI_PCI_COMMAND_H\r
+\r
+//\r
+// The PCI Command register bits owned by PCI Bus driver.\r
+//\r
+// They should be cleared at the beginning. The other registers\r
+// are owned by chipset, we should not touch them.\r
+//\r
+#define EFI_PCI_COMMAND_BITS_OWNED                          ( \\r
+                EFI_PCI_COMMAND_IO_SPACE                    | \\r
+                EFI_PCI_COMMAND_MEMORY_SPACE                | \\r
+                EFI_PCI_COMMAND_BUS_MASTER                  | \\r
+                EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \\r
+                EFI_PCI_COMMAND_VGA_PALETTE_SNOOP           | \\r
+                EFI_PCI_COMMAND_FAST_BACK_TO_BACK             \\r
+                )\r
+\r
+//\r
+// The PCI Bridge Control register bits owned by PCI Bus driver.\r
+// \r
+// They should be cleared at the beginning. The other registers\r
+// are owned by chipset, we should not touch them.\r
+//\r
+#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED                   ( \\r
+                EFI_PCI_BRIDGE_CONTROL_ISA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_VGA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_VGA_16               | \\r
+                EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \\r
+                )\r
+\r
+//\r
+// The PCCard Bridge Control register bits owned by PCI Bus driver.\r
+// \r
+// They should be cleared at the beginning. The other registers\r
+// are owned by chipset, we should not touch them.\r
+//\r
+#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED                ( \\r
+                EFI_PCI_BRIDGE_CONTROL_ISA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_VGA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \\r
+                )\r
+\r
+\r
+#define EFI_GET_REGISTER      1\r
+#define EFI_SET_REGISTER      2\r
+#define EFI_ENABLE_REGISTER   3\r
+#define EFI_DISABLE_REGISTER  4\r
+\r
+EFI_STATUS\r
+PciOperateRegister (\r
+  IN  PCI_IO_DEVICE *PciIoDevice,\r
+  IN  UINT16        Command,\r
+  IN  UINT8         Offset,\r
+  IN  UINT8         Operation,\r
+  OUT UINT16        *PtrCommand\r
+  )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+  TODO: Add function description\r
+\r
+Arguments:\r
+\r
+  PciIoDevice - TODO: add argument description\r
+  Command     - TODO: add argument description\r
+  Offset      - TODO: add argument description\r
+  Operation   - TODO: add argument description\r
+  PtrCommand  - TODO: add argument description\r
+\r
+Returns:\r
+\r
+  TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+BOOLEAN\r
+PciCapabilitySupport (\r
+  IN PCI_IO_DEVICE  *PciIoDevice\r
+  )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+  TODO: Add function description\r
+\r
+Arguments:\r
+\r
+  PciIoDevice - TODO: add argument description\r
+\r
+Returns:\r
+\r
+  TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+EFI_STATUS\r
+LocateCapabilityRegBlock (\r
+  IN PCI_IO_DEVICE  *PciIoDevice,\r
+  IN UINT8          CapId,\r
+  IN OUT UINT8      *Offset,\r
+  OUT UINT8         *NextRegBlock OPTIONAL\r
+  )\r
+/*++\r
+\r
+Routine Description:\r
+\r
+  TODO: Add function description\r
+\r
+Arguments:\r
+\r
+  PciIoDevice   - TODO: add argument description\r
+  CapId         - TODO: add argument description\r
+  Offset        - TODO: add argument description\r
+  NextRegBlock  - TODO: add argument description\r
+\r
+Returns:\r
+\r
+  TODO: add return values\r
+\r
+--*/\r
+;\r
+\r
+\r
+#define PciReadCommandRegister(a,b) \\r
+        PciOperateRegister (a,0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)\r
+\r
+#define PciSetCommandRegister(a,b) \\r
+        PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)\r
+        \r
+#define PciEnableCommandRegister(a,b) \\r
+        PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)\r
+        \r
+#define PciDisableCommandRegister(a,b) \\r
+        PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)\r
+\r
+#define PciReadBridgeControlRegister(a,b) \\r
+        PciOperateRegister (a,0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)\r
+        \r
+#define PciSetBridgeControlRegister(a,b) \\r
+        PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)\r
+\r
+#define PciEnableBridgeControlRegister(a,b) \\r
+        PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)\r
+        \r
+#define PciDisableBridgeControlRegister(a,b) \\r
+        PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)\r
+\r
+#endif\r