/** @file\r
\r
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
\r
\r
#include <FrameworkDxe.h>\r
+#include <IndustryStandard/Pci.h>\r
+#include <IndustryStandard/SmBios.h>\r
+#include <IndustryStandard/Acpi10.h>\r
\r
#include <Guid/SmBios.h>\r
#include <Guid/Acpi.h>\r
#include <Guid/DxeServices.h>\r
#include <Guid/LegacyBios.h>\r
#include <Guid/StatusCodeDataTypeId.h>\r
+#include <Guid/ImageAuthentication.h>\r
\r
#include <Protocol/BlockIo.h>\r
#include <Protocol/LoadedImage.h>\r
#include <Protocol/DevicePath.h>\r
#include <Protocol/Legacy8259.h>\r
#include <Protocol/PciRootBridgeIo.h>\r
+#include <Protocol/SerialIo.h>\r
+#include <Protocol/SuperIo.h>\r
+#include <Protocol/IoMmu.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/DevicePathLib.h>\r
#include <Library/DxeServicesTableLib.h>\r
-#include <Library/PeCoffLib.h>\r
-#include <Library/CacheMaintenanceLib.h>\r
#include <Library/DebugAgentLib.h>\r
\r
//\r
#define PROTECTED_MODE_BASE_VECTOR_MASTER 0x68\r
#define PROTECTED_MODE_BASE_VECTOR_SLAVE 0x70\r
\r
+//\r
+// When we call CSM16 functions, some CSM16 use es:[offset + 0xabcd] to get data passed from CSM32,\r
+// offset + 0xabcd could overflow which exceeds 0xFFFF which is invalid in real mode.\r
+// So this will keep offset as small as possible to avoid offset overflow in real mode.\r
+//\r
+#define NORMALIZE_EFI_SEGMENT(_Adr) (UINT16) (((UINTN) (_Adr)) >> 4)\r
+#define NORMALIZE_EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xf)\r
+\r
//\r
// Trace defines\r
//\r
#define LEGACY_PCI_TRACE_00E LEGACY_PCI_TRACE + 0x0E\r
#define LEGACY_PCI_TRACE_00F LEGACY_PCI_TRACE + 0x0F\r
\r
+#define BDA_VIDEO_MODE 0x49\r
+\r
+#define IDE_PI_REGISTER_PNE BIT0\r
+#define IDE_PI_REGISTER_SNE BIT2\r
\r
typedef struct {\r
UINTN PciSegment;\r
#define CONVENTIONAL_MEMORY_TOP 0xA0000 // 640 KB\r
#define INITIAL_VALUE_BELOW_1K 0x0\r
\r
-#elif defined (MDE_CPU_IPF)\r
-\r
-#define NUM_REAL_GDT_ENTRIES 3\r
-#define CONVENTIONAL_MEMORY_TOP 0x80000 // 512 KB\r
-#define INITIAL_VALUE_BELOW_1K 0xff\r
-\r
#endif\r
\r
#pragma pack(1)\r
BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
} LOW_MEMORY_THUNK;\r
\r
-#elif defined (MDE_CPU_IPF)\r
-\r
-typedef struct {\r
- //\r
- // Space for the code\r
- // The address of Code is also the beginning of the relocated Thunk code\r
- //\r
- CHAR8 Code[4096]; // ?\r
- //\r
- // The address of the Reverse Thunk code\r
- // Note that this member CONTAINS the address of the relocated reverse thunk\r
- // code unlike the member variable 'Code', which IS the address of the Thunk\r
- // code.\r
- //\r
- UINT32 LowReverseThunkStart;\r
-\r
- //\r
- // Data for the code (cs releative)\r
- //\r
- DESCRIPTOR32 GdtDesc; // Protected mode GDT\r
- DESCRIPTOR32 IdtDesc; // Protected mode IDT\r
- UINT32 FlatSs;\r
- UINT32 FlatEsp;\r
-\r
- UINT32 LowCodeSelector; // Low code selector in GDT\r
- UINT32 LowDataSelector; // Low data selector in GDT\r
- UINT32 LowStack;\r
- DESCRIPTOR32 RealModeIdtDesc;\r
-\r
- //\r
- // real-mode GDT (temporary GDT with two real mode segment descriptors)\r
- //\r
- GDT32 RealModeGdt[NUM_REAL_GDT_ENTRIES];\r
- DESCRIPTOR32 RealModeGdtDesc;\r
-\r
- //\r
- // Members specifically for the reverse thunk\r
- // The RevReal* members are used to store the current state of real mode\r
- // before performing the reverse thunk. The RevFlat* members must be set\r
- // before calling the reverse thunk assembly code.\r
- //\r
- UINT16 RevRealDs;\r
- UINT16 RevRealSs;\r
- UINT32 RevRealEsp;\r
- DESCRIPTOR32 RevRealIdtDesc;\r
- UINT16 RevFlatDataSelector; // Flat data selector in GDT\r
- UINT32 RevFlatStack;\r
-\r
- //\r
- // A low memory stack\r
- //\r
- CHAR8 Stack[LOW_STACK_SIZE];\r
-\r
- //\r
- // Stack for flat mode after reverse thunk\r
- // @bug - This may no longer be necessary if the reverse thunk interface\r
- // is changed to have the flat stack in a different location.\r
- //\r
- CHAR8 RevThunkStack[LOW_STACK_SIZE];\r
-\r
- //\r
- // Legacy16 Init memory map info\r
- //\r
- EFI_TO_COMPATIBILITY16_INIT_TABLE EfiToLegacy16InitTable;\r
-\r
- EFI_TO_COMPATIBILITY16_BOOT_TABLE EfiToLegacy16BootTable;\r
-\r
- CHAR8 InterruptRedirectionCode[32];\r
- EFI_LEGACY_INSTALL_PCI_HANDLER PciHandler;\r
- EFI_DISPATCH_OPROM_TABLE DispatchOpromTable;\r
- BBS_TABLE BbsTable[MAX_BBS_ENTRIES];\r
-} LOW_MEMORY_THUNK;\r
-\r
#endif\r
\r
//\r
EfiAcpiAddressRangeMemory = 1,\r
EfiAcpiAddressRangeReserved = 2,\r
EfiAcpiAddressRangeACPI = 3,\r
- EfiAcpiAddressRangeNVS = 4\r
+ EfiAcpiAddressRangeNVS = 4,\r
+ EfiAddressRangePersistentMemory = 7\r
} EFI_ACPI_MEMORY_TYPE;\r
\r
typedef struct {\r
\r
extern EFI_GENERIC_MEMORY_TEST_PROTOCOL *gGenMemoryTest;\r
\r
+extern BOOLEAN mEndOfDxe;\r
+\r
#define PORT_70 0x70\r
#define PORT_71 0x71\r
\r
//\r
// Timer 0, Read/Write LSB then MSB, Square wave output, binary count use.\r
//\r
-#define TIMER0_CONTROL_WORD 0x36 \r
+#define TIMER0_CONTROL_WORD 0x36\r
\r
#define LEGACY_BIOS_INSTANCE_SIGNATURE SIGNATURE_32 ('L', 'B', 'I', 'T')\r
typedef struct {\r
EFI_HANDLE ImageHandle;\r
\r
//\r
- // CPU Architectural Protocol \r
+ // CPU Architectural Protocol\r
//\r
EFI_CPU_ARCH_PROTOCOL *Cpu;\r
\r
//\r
- // Timer Architectural Protocol \r
+ // Timer Architectural Protocol\r
//\r
EFI_TIMER_ARCH_PROTOCOL *Timer;\r
- BOOLEAN TimerUses8254; \r
- \r
+ BOOLEAN TimerUses8254;\r
+\r
//\r
// Protocol to Lock and Unlock 0xc0000 - 0xfffff\r
//\r
// Interrupt control for thunk and PCI IRQ\r
//\r
EFI_LEGACY_8259_PROTOCOL *Legacy8259;\r
- \r
+\r
//\r
// PCI Interrupt PIRQ control\r
//\r
//\r
// Indicate that whether GenericLegacyBoot is entered or not\r
//\r
- BOOLEAN LegacyBootEntered; \r
+ BOOLEAN LegacyBootEntered;\r
\r
//\r
// CSM16 PCI Interface Version\r
@param RomSize Size of ROM Image\r
@param Flags Indicates if ROM found and if PC-AT.\r
\r
- @retval EFI_SUCCESS Legacy Option ROM availible for this device\r
+ @retval EFI_SUCCESS Legacy Option ROM available for this device\r
@retval EFI_UNSUPPORTED Legacy Option ROM not supported.\r
\r
**/\r
);\r
\r
/**\r
- Do an AllocatePages () of type AllocateMaxAddress for EfiBootServicesCode\r
- memory.\r
+ Allocate memory for legacy usage.\r
\r
- @param AllocateType Allocated Legacy Memory Type\r
+ @param AllocateType The type of allocation to perform.\r
+ @param MemoryType The type of memory to allocate.\r
@param StartPageAddress Start address of range\r
@param Pages Number of pages to allocate\r
@param Result Result of allocation\r
EFI_STATUS\r
AllocateLegacyMemory (\r
IN EFI_ALLOCATE_TYPE AllocateType,\r
+ IN EFI_MEMORY_TYPE MemoryType,\r
IN EFI_PHYSICAL_ADDRESS StartPageAddress,\r
IN UINTN Pages,\r
OUT EFI_PHYSICAL_ADDRESS *Result\r
\r
/**\r
Checks the state of the floppy and if media is inserted.\r
- \r
+\r
This routine checks the state of the floppy and if media is inserted.\r
There are 3 cases:\r
No floppy present - Set BBS entry to ignore\r
@param[out] OpromRevision Revision of the PCI Rom\r
@param[out] ConfigUtilityCodeHeaderPointer of Configuration Utility Code Header\r
\r
- @return EFI_SUCCESS Legacy Option ROM availible for this device\r
+ @return EFI_SUCCESS Legacy Option ROM available for this device\r
@return EFI_ALREADY_STARTED This device is already managed by its Oprom\r
@return EFI_UNSUPPORTED Legacy Option ROM not supported.\r
\r
IN UINTN StackSize\r
);\r
\r
+/**\r
+ Load a legacy PC-AT OpROM for VGA controller.\r
+\r
+ @param Private Driver private data.\r
+\r
+ @retval EFI_SUCCESS Legacy ROM successfully installed for this device.\r
+ @retval EFI_DEVICE_ERROR No VGA device handle found, or native EFI video\r
+ driver cannot be successfully disconnected, or VGA\r
+ thunk driver cannot be successfully connected.\r
+\r
+**/\r
+EFI_STATUS\r
+LegacyBiosInstallVgaRom (\r
+ IN LEGACY_BIOS_INSTANCE *Private\r
+ );\r
+\r
#endif\r
projects / mirror_edk2.git / blobdiff