IntelFrameworkModulePkg: Clean up source files

[mirror_edk2.git] / IntelFrameworkModulePkg / Csm / LegacyBiosDxe / Thunk.c

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
index d330f4870baa62608e3c6035968d16cc6df61cf1..d59686eac996231a5adcae2f540427f673ecc635 100644 (file)
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/Thunk.c
@@ -1,7 +1,7 @@
 /** @file\r
   Call into 16-bit BIOS code, Use AsmThunk16 function of BaseLib.\r
 \r
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions\r
@@ -77,7 +77,7 @@ LegacyBiosInt86 (
     Segment               = (UINT16)(((UINT32 *)0)[BiosInt] >> 16);\r
     Offset                = (UINT16)((UINT32 *)0)[BiosInt];\r
   );\r
-  \r
+\r
   return InternalLegacyBiosFarCall (\r
            This,\r
            Segment,\r
@@ -131,7 +131,7 @@ LegacyBiosFarCall86 (
 }\r
 \r
 /**\r
-  Provide NULL interrupt handler which is used to check \r
+  Provide NULL interrupt handler which is used to check\r
   if there is more than one HW interrupt registers with the CPU AP.\r
 \r
   @param  InterruptType - The type of interrupt that occured\r
@@ -218,7 +218,7 @@ InternalLegacyBiosFarCall (
   // Disable DXE Timer while executing in real mode\r
   //\r
   Private->Timer->SetTimerPeriod (Private->Timer, 0);\r
- \r
+\r
   //\r
   // Save and disable interrupt of debug timer\r
   //\r
@@ -231,14 +231,14 @@ InternalLegacyBiosFarCall (
 \r
   //\r
   // Check to see if there is more than one HW interrupt registers with the CPU AP.\r
-  // If there is, then ASSERT() since that is not compatible with the CSM because \r
-  // interupts other than the Timer interrupt that was disabled above can not be \r
+  // If there is, then ASSERT() since that is not compatible with the CSM because\r
+  // interupts other than the Timer interrupt that was disabled above can not be\r
   // handled properly from real mode.\r
   //\r
   DEBUG_CODE (\r
     UINTN  Vector;\r
     UINTN  Count;\r
-    \r
+\r
     for (Vector = 0x20, Count = 0; Vector < 0x100; Vector++) {\r
       Status = Private->Cpu->RegisterInterruptHandler (Private->Cpu, Vector, LegacyBiosNullInterruptHandler);\r
       if (Status == EFI_ALREADY_STARTED) {\r
@@ -255,14 +255,14 @@ InternalLegacyBiosFarCall (
   );\r
 \r
   //\r
-  // If the Timer AP has enabled the 8254 timer IRQ and the current 8254 timer \r
-  // period is less than the CSM required rate of 54.9254, then force the 8254 \r
+  // If the Timer AP has enabled the 8254 timer IRQ and the current 8254 timer\r
+  // period is less than the CSM required rate of 54.9254, then force the 8254\r
   // PIT counter to 0, which is the CSM required rate of 54.9254 ms\r
   //\r
   if (Private->TimerUses8254 && TimerPeriod < 549254) {\r
     SetPitCount (0);\r
   }\r
-  \r
+\r
   if (Stack != NULL && StackSize != 0) {\r
     //\r
     // Copy Stack to low memory stack\r
@@ -310,7 +310,7 @@ InternalLegacyBiosFarCall (
   // End critical section\r
   //\r
   gBS->RestoreTPL (OriginalTpl);\r
-  \r
+\r
   //\r
   // OPROM may allocate EBDA range by itself and change EBDA base and EBDA size.\r
   // Get the current EBDA base address, and compared with pre-allocate minimum\r
@@ -385,27 +385,27 @@ LegacyBiosInitializeThunk (
   TimerVector = 0;\r
   Status = Private->Legacy8259->GetVector (Private->Legacy8259, Efi8259Irq0, &TimerVector);\r
   ASSERT_EFI_ERROR (Status);\r
-  \r
+\r
   //\r
   // Check to see if the Timer AP has hooked the IRQ0 from the 8254 PIT\r
-  //  \r
+  //\r
   Status = Private->Cpu->RegisterInterruptHandler (\r
-                           Private->Cpu, \r
-                           TimerVector, \r
+                           Private->Cpu,\r
+                           TimerVector,\r
                            LegacyBiosNullInterruptHandler\r
                            );\r
   if (Status == EFI_SUCCESS) {\r
     //\r
-    // If the Timer AP has not enabled the 8254 timer IRQ, then force the 8254 PIT \r
+    // If the Timer AP has not enabled the 8254 timer IRQ, then force the 8254 PIT\r
     // counter to 0, which is the CSM required rate of 54.9254 ms\r
     //\r
     Private->Cpu->RegisterInterruptHandler (\r
-                    Private->Cpu, \r
-                    TimerVector, \r
+                    Private->Cpu,\r
+                    TimerVector,\r
                     NULL\r
                     );\r
     SetPitCount (0);\r
-    \r
+\r
     //\r
     // Save status that the Timer AP is not using the 8254 PIT\r
     //\r
@@ -421,6 +421,6 @@ LegacyBiosInitializeThunk (
     //\r
     ASSERT (FALSE);\r
   }\r
-  \r
+\r
   return EFI_SUCCESS;\r
 }\r