/** @file\r
This protocol abstracts the 8259 interrupt controller. This includes\r
- PCI IRQ routing need to program the PCI Interrupt Line register.\r
+ PCI IRQ routing needed to program the PCI Interrupt Line register.\r
\r
Copyright (c) 2007, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
- Module Name: Legacy8259.h\r
-\r
@par Revision Reference:\r
This protocol is defined in Framework for EFI Compatibility Support Module spec\r
Version 0.97.\r
#ifndef _EFI_LEGACY_8259_H_\r
#define _EFI_LEGACY_8259_H_\r
\r
-#include <PiDxe.h>\r
\r
#define EFI_LEGACY_8259_PROTOCOL_GUID \\r
{ \\r
\r
@param This Protocol instance pointer.\r
@param MasterBase The base vector for the Master PIC in the 8259 controller\r
- @param Slavebase The base vector for the Master PIC in the 8259 controller\r
+ @param SlaveBase The base vector for the Slave PIC in the 8259 controller\r
\r
@retval EFI_SUCCESS The new bases were programmed\r
- @retval EFI_DEVICE_ERROR A device erro occured programming the vector bases\r
+ @retval EFI_DEVICE_ERROR A device error occured programming the vector bases\r
\r
**/\r
typedef\r
@param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15\r
\r
@retval EFI_SUCCESS 8259 status returned\r
- @retval EFI_DEVICE_ERROR Error reading 8259\r
+ @retval EFI_DEVICE_ERROR Error writing 8259\r
\r
**/\r
typedef\r
@param EdgeLevel Optional trigger mask for the new mode.\r
\r
@retval EFI_SUCCESS 8259 programmed\r
- @retval EFI_DEVICE_ERROR Error writting to 8259\r
+ @retval EFI_DEVICE_ERROR Error writing to 8259\r
\r
**/\r
typedef\r