well known naming conventions.\r
\r
Thunk is the code that switches from 32-bit protected environment into the 16-bit real-mode\r
- environment. Reverse thunk is the code that does the opposite.\r
+ environment. Reverse thunk is the code that does the opposite.\r
\r
-Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials are licensed and made available under \r
-the terms and conditions of the BSD License that accompanies this distribution. \r
-The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php. \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
@par Revision Reference:\r
This protocol is defined in Framework for EFI Compatibility Support Module spec\r
#define _EFI_LEGACY_BIOS_H_\r
\r
///\r
-/// \r
+///\r
///\r
#pragma pack(1)\r
\r
/// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r
///\r
UINT32 Signature;\r
- \r
+\r
///\r
/// The value required such that byte checksum of TableLength equals zero.\r
///\r
UINT8 TableChecksum;\r
- \r
+\r
///\r
/// The length of this table.\r
///\r
UINT8 TableLength;\r
- \r
+\r
///\r
/// The major EFI revision for which this table was generated.\r
- /// \r
+ ///\r
UINT8 EfiMajorRevision;\r
- \r
+\r
///\r
/// The minor EFI revision for which this table was generated.\r
///\r
UINT8 EfiMinorRevision;\r
- \r
+\r
///\r
/// The major revision of this table.\r
///\r
UINT8 TableMajorRevision;\r
- \r
+\r
///\r
/// The minor revision of this table.\r
///\r
UINT8 TableMinorRevision;\r
- \r
+\r
///\r
/// Reserved for future usage.\r
///\r
UINT16 Reserved;\r
- \r
+\r
///\r
/// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r
///\r
UINT16 Compatibility16CallSegment;\r
- \r
+\r
///\r
/// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r
///\r
UINT16 Compatibility16CallOffset;\r
- \r
+\r
///\r
- /// The segment of the entry point within the traditional BIOS for EfiCompatibility \r
+ /// The segment of the entry point within the traditional BIOS for EfiCompatibility\r
/// to invoke the PnP installation check.\r
///\r
UINT16 PnPInstallationCheckSegment;\r
- \r
+\r
///\r
- /// The Offset of the entry point within the traditional BIOS for EfiCompatibility \r
+ /// The Offset of the entry point within the traditional BIOS for EfiCompatibility\r
/// to invoke the PnP installation check.\r
///\r
UINT16 PnPInstallationCheckOffset;\r
- \r
+\r
///\r
- /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform \r
+ /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform\r
///Innovation Framework for EFI Driver Execution Environment Core Interface Specification (DXE CIS).\r
///\r
- UINT32 EfiSystemTable; \r
- \r
+ UINT32 EfiSystemTable;\r
+\r
///\r
/// The address of an OEM-provided identifier string. The string is null terminated.\r
///\r
UINT32 OemIdStringPointer;\r
- \r
+\r
///\r
/// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r
/// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r
/// RSD PTR with either the ACPI 1.0b or 2.0 values.\r
///\r
UINT32 AcpiRsdPtrPointer;\r
- \r
+\r
///\r
/// The OEM revision number. Usage is undefined but provided for OEM module usage.\r
///\r
UINT16 OemRevision;\r
- \r
+\r
///\r
/// The 32-bit physical address where INT15 E820 data is stored within the traditional\r
/// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r
/// data to the indicated area.\r
///\r
UINT32 E820Pointer;\r
- \r
+\r
///\r
/// The length of the E820 data and is filled in by the EfiCompatibility code.\r
///\r
UINT32 E820Length;\r
- \r
+\r
///\r
/// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r
/// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r
/// copy the data to the indicated area.\r
///\r
UINT32 IrqRoutingTablePointer;\r
- \r
+\r
///\r
/// The length of the $PIR table and is filled in by the EfiCompatibility code.\r
///\r
UINT32 IrqRoutingTableLength;\r
- \r
+\r
///\r
/// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r
- /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data \r
+ /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data\r
/// to the indicated area.\r
///\r
UINT32 MpTablePtr;\r
- \r
+\r
///\r
/// The length of the MP table and is filled in by the EfiCompatibility code.\r
///\r
UINT32 MpTableLength;\r
- \r
+\r
///\r
/// The segment of the OEM-specific INT table/code.\r
- /// \r
+ ///\r
UINT16 OemIntSegment;\r
- \r
+\r
///\r
/// The offset of the OEM-specific INT table/code.\r
///\r
UINT16 OemIntOffset;\r
- \r
+\r
///\r
/// The segment of the OEM-specific 32-bit table/code.\r
///\r
UINT16 Oem32Segment;\r
- \r
+\r
///\r
/// The offset of the OEM-specific 32-bit table/code.\r
///\r
UINT16 Oem32Offset;\r
- \r
+\r
///\r
/// The segment of the OEM-specific 16-bit table/code.\r
///\r
UINT16 Oem16Segment;\r
- \r
+\r
///\r
/// The offset of the OEM-specific 16-bit table/code.\r
///\r
UINT16 Oem16Offset;\r
- \r
+\r
///\r
/// The segment of the TPM binary passed to 16-bit CSM.\r
///\r
UINT16 TpmSegment;\r
- \r
+\r
///\r
/// The offset of the TPM binary passed to 16-bit CSM.\r
///\r
UINT16 TpmOffset;\r
- \r
+\r
///\r
/// A pointer to a string identifying the independent BIOS vendor.\r
///\r
UINT32 IbvPointer;\r
- \r
+\r
///\r
/// This field is NULL for all systems not supporting PCI Express. This field is the base\r
/// value of the start of the PCI Express memory-mapped configuration registers and\r
/// Functions.\r
///\r
UINT32 PciExpressBase;\r
- \r
+\r
///\r
/// Maximum PCI bus number assigned.\r
///\r
///\r
/// Start Address of Upper Memory Area (UMA) to be set as Read/Write. If\r
/// UmaAddress is a valid address in the shadow RAM, it also indicates that the region\r
- /// from 0xC0000 to (UmaAddress ¨C 1) can be used for Option ROM.\r
+ /// from 0xC0000 to (UmaAddress - 1) can be used for Option ROM.\r
///\r
UINT32 UmaAddress;\r
\r
} EFI_COMPATIBILITY16_TABLE;\r
\r
///\r
-/// Functions provided by the CSM binary which communicate between the EfiCompatibility \r
+/// Functions provided by the CSM binary which communicate between the EfiCompatibility\r
/// and Compatability16 code.\r
///\r
-/// Inconsistent with the specification here: \r
-/// The member's name started with "Compatibility16" [defined in Intel Framework \r
-/// Compatibility Support Module Specification / 0.97 version] \r
+/// Inconsistent with the specification here:\r
+/// The member's name started with "Compatibility16" [defined in Intel Framework\r
+/// Compatibility Support Module Specification / 0.97 version]\r
/// has been changed to "Legacy16" since keeping backward compatible.\r
///\r
typedef enum {\r
/// AX = Return Status codes\r
///\r
Legacy16InitializeYourself = 0x0000,\r
- \r
+\r
///\r
/// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r
/// Input:\r
/// AX = Returned status codes\r
///\r
Legacy16UpdateBbs = 0x0001,\r
- \r
+\r
///\r
/// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r
/// code is read/write.\r
/// Input:\r
/// AX = Compatibility16PrepareToBoot\r
- /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r
+ /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure\r
/// Return:\r
/// AX = Returned status codes\r
///\r
Legacy16PrepareToBoot = 0x0002,\r
- \r
+\r
///\r
/// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r
/// Input:\r
/// AX = Returned status codes\r
///\r
Legacy16Boot = 0x0003,\r
- \r
+\r
///\r
/// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r
/// stored in CMOS and is the priority number of the last attempted boot device.\r
/// BX = Priority number of the boot device.\r
///\r
Legacy16RetrieveLastBootDevice = 0x0004,\r
- \r
+\r
///\r
/// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r
/// Input:\r
/// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r
///\r
Legacy16DispatchOprom = 0x0005,\r
- \r
+\r
///\r
/// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r
/// of that region.\r
/// DS:BX = Address of the region\r
///\r
Legacy16GetTableAddress = 0x0006,\r
- \r
+\r
///\r
/// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r
/// Input:\r
/// AX = Returned status codes\r
///\r
Legacy16SetKeyboardLeds = 0x0007,\r
- \r
+\r
///\r
/// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r
/// do not have an OpROM associated with them. An example is SATA.\r
UINT32 BbsTablePointer; ///< A pointer to the BBS table.\r
UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r
///< means that the relocation of this run time code is not supported.\r
- ///< Inconsistent with specification here: \r
- ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r
+ ///< Inconsistent with specification here:\r
+ ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]\r
///< has been changed to "RuntimeSegment" since keeping backward compatible.\r
\r
} EFI_DISPATCH_OPROM_TABLE;\r
/// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r
///\r
UINT32 BiosLessThan1MB;\r
- \r
+\r
///\r
/// The starting address of the high memory block.\r
///\r
UINT32 HiPmmMemory;\r
- \r
+\r
///\r
/// The length of high memory block.\r
///\r
UINT32 HiPmmMemorySizeInBytes;\r
- \r
+\r
///\r
/// The segment of the reverse thunk call code.\r
///\r
UINT16 ReverseThunkCallSegment;\r
- \r
+\r
///\r
/// The offset of the reverse thunk call code.\r
///\r
UINT16 ReverseThunkCallOffset;\r
- \r
+\r
///\r
/// The number of E820 entries copied to the Compatibility16 BIOS.\r
///\r
UINT32 NumberE820Entries;\r
- \r
+\r
///\r
/// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r
///\r
UINT32 OsMemoryAbove1Mb;\r
- \r
+\r
///\r
/// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r
///\r
UINT32 ThunkStart;\r
- \r
+\r
///\r
/// The size of the thunk code.\r
///\r
UINT32 ThunkSizeInBytes;\r
- \r
+\r
///\r
/// Starting address of memory under 1 MB.\r
///\r
UINT32 LowPmmMemory;\r
- \r
+\r
///\r
/// The length of low Memory block.\r
///\r
/// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r
/// 1 is slave.\r
///\r
- UINT16 Status; \r
- \r
+ UINT16 Status;\r
+\r
///\r
/// PCI bus of IDE controller.\r
///\r
UINT32 Bus;\r
- \r
+\r
///\r
/// PCI device of IDE controller.\r
///\r
UINT32 Device;\r
- \r
+\r
///\r
/// PCI function of IDE controller.\r
///\r
UINT32 Function;\r
- \r
+\r
///\r
/// Command ports base address.\r
///\r
UINT16 CommandBaseAddress;\r
- \r
+\r
///\r
/// Control ports base address.\r
///\r
UINT16 ControlBaseAddress;\r
- \r
+\r
///\r
/// Bus master address.\r
///\r
UINT16 BusMasterAddress;\r
- \r
+\r
UINT8 HddIrq;\r
- \r
+\r
///\r
/// Data that identifies the drive data; one per possible attached drive.\r
///\r
UINT16 Enabled : 1; ///< If 0, ignore this entry.\r
UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r
///< 1 = Boot attempted failed.\r
- \r
+\r
///\r
/// State of media present.\r
/// 00 = No bootable media is present in the device.\r
/// The boot priority for this boot device. Values are defined below.\r
///\r
UINT16 BootPriority;\r
- \r
+\r
///\r
/// The PCI bus for this boot device.\r
///\r
UINT32 Bus;\r
- \r
+\r
///\r
/// The PCI device for this boot device.\r
///\r
UINT32 Device;\r
- \r
+\r
///\r
/// The PCI function for the boot device.\r
///\r
UINT32 Function;\r
- \r
+\r
///\r
/// The PCI class for this boot device.\r
///\r
UINT8 Class;\r
- \r
+\r
///\r
/// The PCI Subclass for this boot device.\r
///\r
UINT8 SubClass;\r
- \r
+\r
///\r
/// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
///\r
UINT16 MfgStringOffset;\r
- \r
+\r
///\r
/// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r
- /// \r
+ ///\r
UINT16 MfgStringSegment;\r
- \r
+\r
///\r
/// BBS device type. BBS device types are defined below.\r
///\r
UINT16 DeviceType;\r
- \r
+\r
///\r
/// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r
///\r
BBS_STATUS_FLAGS StatusFlags;\r
- \r
+\r
///\r
/// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
/// BCV devices.\r
///\r
UINT16 BootHandlerOffset;\r
- \r
+\r
///\r
/// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r
/// BCV devices.\r
- /// \r
+ ///\r
UINT16 BootHandlerSegment;\r
- \r
+\r
///\r
/// Segment:offset address of an ASCIIZ description string describing this device.\r
///\r
/// Segment:offset address of an ASCIIZ description string describing this device.\r
///\r
UINT16 DescStringSegment;\r
- \r
+\r
///\r
/// Reserved.\r
///\r
UINT32 InitPerReserved;\r
- \r
+\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
///\r
UINT32 AdditionalIrq13Handler;\r
- \r
+\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- /// \r
+ ///\r
UINT32 AdditionalIrq18Handler;\r
- \r
+\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- /// \r
+ ///\r
UINT32 AdditionalIrq19Handler;\r
- \r
+\r
///\r
/// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r
/// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r
/// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r
- /// \r
+ ///\r
UINT32 AdditionalIrq40Handler;\r
UINT8 AssignedDriveNumber;\r
UINT32 AdditionalIrq41Handler;\r
/// values are reserved for future usage.\r
///\r
UINT16 Type : 3;\r
- \r
+\r
///\r
/// The size of "port" in bits. Defined values are below.\r
///\r
UINT16 PortGranularity : 3;\r
- \r
+\r
///\r
/// The size of data in bits. Defined values are below.\r
///\r
UINT16 DataGranularity : 3;\r
- \r
+\r
///\r
/// Reserved for future use.\r
///\r
/// SMM_ATTRIBUTES is defined below.\r
///\r
SMM_ATTRIBUTES SmmAttributes;\r
- \r
+\r
///\r
/// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r
///\r
SMM_FUNCTION SmmFunction;\r
- \r
+\r
///\r
/// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
///\r
UINT8 SmmPort;\r
- \r
+\r
///\r
/// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes.\r
///\r
/// This bit set indicates that the ServiceAreaData is valid.\r
///\r
UINT8 DirectoryServiceValidity : 1;\r
- \r
+\r
///\r
/// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r
/// DirectoryServiceValidity is 0.\r
///\r
UINT8 RabcaUsedFlag : 1;\r
- \r
+\r
///\r
/// This bit set indicates to execute hard disk diagnostics.\r
///\r
UINT8 ExecuteHddDiagnosticsFlag : 1;\r
- \r
+\r
///\r
/// Reserved for future use. Set to 0.\r
///\r
/// UDC_ATTRIBUTES is defined below.\r
///\r
UDC_ATTRIBUTES Attributes;\r
- \r
+\r
///\r
/// This field contains the zero-based device on which the selected\r
- /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r
+ /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.\r
///\r
UINT8 DeviceNumber;\r
- \r
+\r
///\r
/// This field contains the zero-based index into the BbsTable for the parent device.\r
/// This index allows the user to reference the parent device information such as PCI\r
/// bus, device function.\r
///\r
UINT8 BbsTableEntryNumberForParentDevice;\r
- \r
+\r
///\r
/// This field contains the zero-based index into the BbsTable for the boot entry.\r
///\r
UINT8 BbsTableEntryNumberForBoot;\r
- \r
+\r
///\r
/// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r
///\r
UINT8 BbsTableEntryNumberForHddDiag;\r
- \r
+\r
///\r
/// The raw Beer data.\r
///\r
UINT8 BeerData[128];\r
- \r
+\r
///\r
/// The raw data of selected service area.\r
///\r
#define ROM_WITH_CONFIG 0x04 ///< Not defined in the Framework CSM Specification.\r
\r
///\r
-/// The following macros do not appear in the Framework CSM Specification and \r
-/// are kept for backward compatibility only. They convert 32-bit address (_Adr) \r
+/// The following macros do not appear in the Framework CSM Specification and\r
+/// are kept for backward compatibility only. They convert 32-bit address (_Adr)\r
/// to Segment:Offset 16-bit form.\r
///\r
///@{\r
@param[in,out] Reg Register contexted passed into (and returned) from thunk to\r
16-bit mode.\r
\r
- @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status. \r
+ @retval TRUE Thunk completed with no BIOS errors in the target code. See Regs for status.\r
@retval FALSE There was a BIOS error in the target code.\r
**/\r
typedef\r
- 01 = ROM Found.\r
- 02 = ROM is a valid legacy ROM.\r
\r
- @retval EFI_SUCCESS The Legacy Option ROM availible for this device\r
+ @retval EFI_SUCCESS The Legacy Option ROM available for this device\r
@retval EFI_UNSUPPORTED The Legacy Option ROM is not supported.\r
\r
**/\r
);\r
\r
/**\r
- This function takes the Leds input parameter and sets/resets the BDA accordingly. \r
- Leds is also passed to Compatibility16 code, in case any special processing is required. \r
+ This function takes the Leds input parameter and sets/resets the BDA accordingly.\r
+ Leds is also passed to Compatibility16 code, in case any special processing is required.\r
This function is normally called from EFI Setup drivers that handle user-selectable\r
keyboard options such as boot with NUM LOCK on/off. This function does not\r
touch the keyboard or keyboard LEDs but only the BDA.\r
Warning: Use this with caution. This routine disconnects all EFI\r
drivers. If used externally, then the caller must re-connect EFI\r
drivers.\r
- \r
+\r
@param[in] This The protocol instance pointer.\r
- \r
+\r
@retval EFI_SUCCESS OPROMs were shadowed.\r
\r
**/\r
/// Performs traditional software INT. See the Int86() function description.\r
///\r
EFI_LEGACY_BIOS_INT86 Int86;\r
- \r
+\r
///\r
/// Performs a far call into Compatibility16 or traditional OpROM code.\r
///\r
EFI_LEGACY_BIOS_FARCALL86 FarCall86;\r
- \r
+\r
///\r
/// Checks if a traditional OpROM exists for this device.\r
///\r
EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;\r
- \r
+\r
///\r
/// Loads a traditional OpROM in traditional OpROM address space.\r
///\r
EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;\r
- \r
+\r
///\r
/// Boots a traditional OS.\r
///\r
EFI_LEGACY_BIOS_BOOT LegacyBoot;\r
- \r
+\r
///\r
/// Updates BDA to reflect the current EFI keyboard LED status.\r
///\r
EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;\r
- \r
+\r
///\r
/// Allows an external agent, such as BIOS Setup, to get the BBS data.\r
///\r
EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;\r
- \r
+\r
///\r
/// Causes all legacy OpROMs to be shadowed.\r
///\r
EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;\r
- \r
+\r
///\r
/// Performs all actions prior to boot. Used when booting an EFI-aware OS\r
- /// rather than a legacy OS. \r
+ /// rather than a legacy OS.\r
///\r
EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;\r
- \r
+\r
///\r
/// Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.\r
///\r
EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;\r
- \r
+\r
///\r
/// Allows EFI to copy data to the area specified by GetLegacyRegion.\r
///\r
EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;\r
- \r
+\r
///\r
/// Allows the user to boot off an unconventional device such as a PARTIES partition.\r
///\r
EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;\r
};\r
\r
+//\r
+// Legacy BIOS needs to access memory in page 0 (0-4095), which is disabled if\r
+// NULL pointer detection feature is enabled. Following macro can be used to\r
+// enable/disable page 0 before/after accessing it.\r
+//\r
+#define ACCESS_PAGE0_CODE(statements) \\r
+ do { \\r
+ EFI_STATUS Status_; \\r
+ EFI_GCD_MEMORY_SPACE_DESCRIPTOR Desc_; \\r
+ \\r
+ Desc_.Attributes = 0; \\r
+ Status_ = gDS->GetMemorySpaceDescriptor (0, &Desc_); \\r
+ ASSERT_EFI_ERROR (Status_); \\r
+ if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r
+ Status_ = gDS->SetMemorySpaceAttributes ( \\r
+ 0, \\r
+ EFI_PAGES_TO_SIZE(1), \\r
+ Desc_.Attributes & ~(UINT64)EFI_MEMORY_RP \\r
+ ); \\r
+ ASSERT_EFI_ERROR (Status_); \\r
+ } \\r
+ \\r
+ { \\r
+ statements; \\r
+ } \\r
+ \\r
+ if ((Desc_.Attributes & EFI_MEMORY_RP) != 0) { \\r
+ Status_ = gDS->SetMemorySpaceAttributes ( \\r
+ 0, \\r
+ EFI_PAGES_TO_SIZE(1), \\r
+ Desc_.Attributes \\r
+ ); \\r
+ ASSERT_EFI_ERROR (Status_); \\r
+ } \\r
+ } while (FALSE)\r
+\r
extern EFI_GUID gEfiLegacyBiosProtocolGuid;\r
\r
#endif\r
projects / mirror_edk2.git / blobdiff