IN EFI_HANDLE HostBridge,\r
IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r
IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
-)\r
-;\r
+);\r
\r
\r
/**\r
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r
IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r
-)\r
-;\r
+);\r
\r
\r
/**\r
(EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY)(\r
IN EFI_PCI_PLATFORM_PROTOCOL *This,\r
OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r
-)\r
-;\r
+);\r
\r
\r
/**\r
IN EFI_HANDLE PciHandle,\r
OUT VOID **RomImage,\r
OUT UINTN *RomSize\r
-)\r
-;\r
+);\r
\r
/**\r
@par Protocol Description:\r