Refine SMM USB Dispatch Protocol definition.

[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / SmmControl.h

diff --git a/IntelFrameworkPkg/Include/Protocol/SmmControl.h b/IntelFrameworkPkg/Include/Protocol/SmmControl.h
index 4ec82777d8ee35a1f65f3db8674f78a5aed6d84d..d33f3fbca1b3c6d82937b62d1af6c74e85aa53ea 100644 (file)
--- a/IntelFrameworkPkg/Include/Protocol/SmmControl.h
+++ b/IntelFrameworkPkg/Include/Protocol/SmmControl.h
@@ -9,7 +9,7 @@
   event from a platform chipset agent is an optional capability for both IA-32 and Itanium based\r
   systems.\r
 \r
-  Copyright (c) 2007, Intel Corporation\r
+  Copyright (c) 2007,2009 Intel Corporation\r
   All rights reserved. This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -37,11 +37,19 @@ typedef struct _EFI_SMM_CONTROL_PROTOCOL              EFI_SMM_CONTROL_PROTOCOL;
   { \\r
     0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \\r
   }\r
-\r
+//\r
 // SMM Access specification Data Structures\r
 //\r
 typedef struct {\r
+  /// \r
+  ///  Describes the I/O location of the particular port that engendered the synchronous\r
+  ///  SMI. For example, this location can include but is not limited to the traditional \r
+  ///  PCAT* APM port of 0B2h.\r
+  ///\r
   UINT8 SmiTriggerRegister;\r
+  ///\r
+  ///  Describes the value that was written to the respective activation port.\r
+  ///\r
   UINT8 SmiDataRegister;\r
 } EFI_SMM_CONTROL_REGISTER;\r
 \r
@@ -78,7 +86,8 @@ EFI_STATUS
   Clears any system state that was created in response to the Active call.\r
 \r
   @param  This                  The EFI_SMM_CONTROL_PROTOCOL instance.\r
-  @param  Periodic              Optional parameter to repeat at this period one time\r
+  @param  Periodic              Optional parameter to repeat at this period one \r
+                                time or, if the Periodic Boolean is set, periodically.\r
 \r
   @retval EFI_SUCCESS           The SMI/PMI has been engendered.\r
   @retval EFI_DEVICE_ERROR      The source could not be cleared.\r
@@ -99,6 +108,8 @@ EFI_STATUS
   @param  SmiRegister           Pointer to the SMI register description structure\r
 \r
   @retval EFI_SUCCESS           The register structure has been returned.\r
+  @retval EFI_DEVICE_ERROR      The source could not be cleared.\r
+  @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
 \r
 **/\r
 typedef\r
@@ -124,12 +135,45 @@ EFI_STATUS
   @param MinimumTriggerPeriod\r
   Minimum interval at which the platform can set the period.\r
 \r
+  @retval EFI_SUCCESS The register structure has been returned.\r
 **/\r
 \r
+//\r
+// SMM Control Protocol\r
+//\r
+/**\r
+  This protocol is used initiate SMI/PMI activations. \r
+  This protocol could be published by either of the following:\r
+    - A processor driver to abstract the SMI/PMI IPI\r
+    - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset\r
+  Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
+  \r
+  The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This\r
+  protocol is useable both in boot services and runtime. The runtime aspect is so that an\r
+  implementation of EFI_SMM_BASE_PROTOCOL.Communicate() can layer upon this service\r
+  and provide an SMI callback from a general EFI runtime driver.\r
+  The purpose of this protocol is to provide an abstraction to the platform hardware that generates an\r
+  SMI or PMI. There are often I/O ports that, when accessed, will engender the\r
+**/\r
 struct _EFI_SMM_CONTROL_PROTOCOL {\r
+  ///\r
+  ///  Initiates the SMI/PMI activation.\r
+  ///\r
   EFI_SMM_ACTIVATE          Trigger;\r
+  ///\r
+  ///  Quiesces the SMI/PMI activation.\r
+  ///\r
   EFI_SMM_DEACTIVATE        Clear;\r
+  ///\r
+  /// Provides data on the register used as the source of the SMI.\r
+  ///\r
   EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;\r
+  ///\r
+  /// Minimum interval at which the platform can set the period. A maximum is not\r
+  /// specified in that the SMM infrastructure code can emulate a maximum interval that is\r
+  /// greater than the hardware capabilities by using software emulation in the SMM\r
+  /// infrastructure code.\r
+  ///\r
   UINTN                     MinimumTriggerPeriod;\r
 };\r
 \r