--- /dev/null
+/** @file\r
+ Internal include file of DXE CPU IO Library.\r
+\r
+ Copyright (c) 2006, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ Module Name: DxeCpuIoLibInternal.h\r
+\r
+**/\r
+\r
+#ifndef _DXE_CPUIO_LIB_INTERNAL_H_\r
+#define _DXE_CPUIO_LIB_INTERNAL_H_\r
+\r
+#include <FrameworkDxe.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/BaseLib.h>\r
+\r
+#include <Protocol/PciRootBridgeIo.h>\r
+#include <Protocol/CpuIo.h>\r
+\r
+/**\r
+ Reads registers in the EFI CPU I/O space.\r
+\r
+ Reads the I/O port specified by Port with registers width specified by Width.\r
+ The read value is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all I/O read and write operations are serialized.\r
+\r
+ @param Port The base address of the I/O operation.\r
+ The caller is responsible for aligning the Address if required.\r
+ @param Width The width of the I/O operation.\r
+\r
+ @return Data read from registers in the EFI CPU I/O space.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoReadWorker (\r
+ IN UINTN Port,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
+ );\r
+\r
+/**\r
+ Writes registers in the EFI CPU I/O space.\r
+\r
+ Writes the I/O port specified by Port with registers width and value specified by Width\r
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all I/O read and write operations are serialized.\r
+\r
+ @param Port The base address of the I/O operation.\r
+ The caller is responsible for aligning the Address if required.\r
+ @param Width The width of the I/O operation.\r
+ @param Data The value to write to the I/O port.\r
+\r
+ @return The paramter of Data.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+IoWriteWorker (\r
+ IN UINTN Port,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 Data\r
+ );\r
+\r
+/**\r
+ Reads memory-mapped registers in the EFI system memory space.\r
+\r
+ Reads the MMIO registers specified by Address with registers width specified by Width.\r
+ The read value is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ @param Address The MMIO register to read.\r
+ The caller is responsible for aligning the Address if required.\r
+ @param Width The width of the I/O operation.\r
+\r
+ @return Data read from registers in the EFI system memory space.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioReadWorker (\r
+ IN UINTN Address,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
+ );\r
+\r
+/**\r
+ Writes memory-mapped registers in the EFI system memory space.\r
+\r
+ Writes the MMIO registers specified by Address with registers width and value specified by Width\r
+ and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
+ This function must guarantee that all MMIO read and write operations are serialized.\r
+\r
+ @param Address The MMIO register to read.\r
+ The caller is responsible for aligning the Address if required.\r
+ @param Width The width of the I/O operation.\r
+\r
+ @return Data read from registers in the EFI system memory space.\r
+\r
+**/\r
+UINT64\r
+EFIAPI\r
+MmioWriteWorker (\r
+ IN UINTN Address,\r
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
+ IN UINT64 Data\r
+ );\r
+\r
+#endif\r