IntelFsp2Pkg: Adopt FSP 2.4 MultiPhase functions.

[mirror_edk2.git] / IntelFsp2Pkg / FspSecCore / Ia32 / Fsp24ApiEntryS.nasm

diff --git a/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm
new file mode 100644 (file)
index 0000000..bda99cd
--- /dev/null
+++ b/IntelFsp2Pkg/FspSecCore/Ia32/Fsp24ApiEntryS.nasm
@@ -0,0 +1,101 @@
+;; @file\r
+;  Provide FSP API entry points.\r
+;\r
+; Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>\r
+; SPDX-License-Identifier: BSD-2-Clause-Patent\r
+;;\r
+\r
+    SECTION .text\r
+\r
+;\r
+; Following functions will be provided in C\r
+;\r
+extern ASM_PFX(FspApiCommon)\r
+extern ASM_PFX(FspMultiPhaseSiInitApiHandlerV2)\r
+\r
+STACK_SAVED_EAX_OFFSET       EQU   4 * 7 ; size of a general purpose register * eax index\r
+\r
+;----------------------------------------------------------------------------\r
+; NotifyPhase API\r
+;\r
+; This FSP API will notify the FSP about the different phases in the boot\r
+; process\r
+;\r
+;----------------------------------------------------------------------------\r
+global ASM_PFX(NotifyPhaseApi)\r
+ASM_PFX(NotifyPhaseApi):\r
+  mov    eax,  2 ; FSP_API_INDEX.NotifyPhaseApiIndex\r
+  jmp    ASM_PFX(FspApiCommon)\r
+\r
+;----------------------------------------------------------------------------\r
+; FspSiliconInit API\r
+;\r
+; This FSP API initializes the CPU and the chipset including the IO\r
+; controllers in the chipset to enable normal operation of these devices.\r
+;\r
+;----------------------------------------------------------------------------\r
+global ASM_PFX(FspSiliconInitApi)\r
+ASM_PFX(FspSiliconInitApi):\r
+  mov    eax,  5 ; FSP_API_INDEX.FspSiliconInitApiIndex\r
+  jmp    ASM_PFX(FspApiCommon)\r
+\r
+;----------------------------------------------------------------------------\r
+; FspMultiPhaseSiInitApi API\r
+;\r
+; This FSP API provides multi-phase silicon initialization, which brings greater\r
+; modularity beyond the existing FspSiliconInit() API.\r
+; Increased modularity is achieved by adding an extra API to FSP-S.\r
+; This allows the bootloader to add board specific initialization steps throughout\r
+; the SiliconInit flow as needed.\r
+;\r
+;----------------------------------------------------------------------------\r
+global ASM_PFX(FspMultiPhaseSiInitApi)\r
+ASM_PFX(FspMultiPhaseSiInitApi):\r
+  mov    eax,  6 ; FSP_API_INDEX.FspMultiPhaseSiInitApiIndex\r
+  jmp    ASM_PFX(FspApiCommon)\r
+\r
+;----------------------------------------------------------------------------\r
+; FspApiCommonContinue API\r
+;\r
+; This is the FSP API common entry point to resume the FSP execution\r
+;\r
+;----------------------------------------------------------------------------\r
+global ASM_PFX(FspApiCommonContinue)\r
+ASM_PFX(FspApiCommonContinue):\r
+  ;\r
+  ; Handle FspMultiPhaseSiInitApiIndex API\r
+  ;\r
+  cmp    eax, 6   ; FspMultiPhaseSiInitApiIndex\r
+  jnz    NotMultiPhaseSiInitApi\r
+\r
+  pushad\r
+  push   DWORD [esp + (4 * 8 + 4)]  ; push ApiParam\r
+  push   eax                        ; push ApiIdx\r
+  call   ASM_PFX(FspMultiPhaseSiInitApiHandlerV2)\r
+  add    esp, 8\r
+  mov    dword  [esp + STACK_SAVED_EAX_OFFSET], eax\r
+  popad\r
+  ret\r
+\r
+NotMultiPhaseSiInitApi:\r
+  jmp $\r
+  ret\r
+\r
+;----------------------------------------------------------------------------\r
+; TempRamInit API\r
+;\r
+; Empty function for WHOLEARCHIVE build option\r
+;\r
+;----------------------------------------------------------------------------\r
+global ASM_PFX(TempRamInitApi)\r
+ASM_PFX(TempRamInitApi):\r
+  jmp $\r
+  ret\r
+\r
+;----------------------------------------------------------------------------\r
+; Module Entrypoint API\r
+;----------------------------------------------------------------------------\r
+global ASM_PFX(_ModuleEntryPoint)\r
+ASM_PFX(_ModuleEntryPoint):\r
+  jmp $\r
+\r