UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm

[mirror_edk2.git] / IntelFsp2Pkg / FspSecCore / SecMain.h

diff --git a/IntelFsp2Pkg/FspSecCore/SecMain.h b/IntelFsp2Pkg/FspSecCore/SecMain.h
index f6333b0ffb0f5ff87d7c18dc49cbcdda139fd1a4..a09653da96714899561e75a4976b93e5dda544fd 100644 (file)
--- a/IntelFsp2Pkg/FspSecCore/SecMain.h
+++ b/IntelFsp2Pkg/FspSecCore/SecMain.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2014 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -8,7 +8,6 @@
 #ifndef _SEC_CORE_H_\r
 #define _SEC_CORE_H_\r
 \r
-\r
 #include <PiPei.h>\r
 #include <Ppi/TemporaryRamSupport.h>\r
 \r
@@ -21,13 +20,16 @@
 #include <Library/SerialPortLib.h>\r
 #include <Library/FspSwitchStackLib.h>\r
 #include <Library/FspCommonLib.h>\r
+#include <Library/CpuLib.h>\r
 #include <Library/UefiCpuLib.h>\r
 #include <FspEas.h>\r
 \r
-typedef VOID (*PEI_CORE_ENTRY) ( \\r
-  IN CONST  EFI_SEC_PEI_HAND_OFF    *SecCoreData, \\r
-  IN CONST  EFI_PEI_PPI_DESCRIPTOR  *PpiList \\r
-);\r
+typedef\r
+VOID\r
+(EFIAPI *PEI_CORE_ENTRY)(\r
+  IN CONST  EFI_SEC_PEI_HAND_OFF    *SecCoreData,\r
+  IN CONST  EFI_PEI_PPI_DESCRIPTOR  *PpiList\r
+  );\r
 \r
 typedef struct _SEC_IDT_TABLE {\r
   //\r
@@ -36,8 +38,8 @@ typedef struct _SEC_IDT_TABLE {
   // Note: For IA32, only the 4 bytes immediately preceding IDT is used to store\r
   // EFI_PEI_SERVICES**\r
   //\r
-  UINT64            PeiService;\r
-  UINT64            IdtTable[FixedPcdGet8 (PcdFspMaxInterruptSupported)];\r
+  UINT64                      PeiService;\r
+  IA32_IDT_GATE_DESCRIPTOR    IdtTable[FixedPcdGet8 (PcdFspMaxInterruptSupported)];\r
 } SEC_IDT_TABLE;\r
 \r
 /**\r
@@ -52,8 +54,8 @@ typedef struct _SEC_IDT_TABLE {
 VOID\r
 EFIAPI\r
 SecSwitchStack (\r
-  IN UINT32   TemporaryMemoryBase,\r
-  IN UINT32   PermenentMemoryBase\r
+  IN UINTN  TemporaryMemoryBase,\r
+  IN UINTN  PermenentMemoryBase\r
   );\r
 \r
 /**\r
@@ -75,13 +77,12 @@ SecSwitchStack (
 EFI_STATUS\r
 EFIAPI\r
 SecTemporaryRamSupport (\r
-  IN CONST EFI_PEI_SERVICES   **PeiServices,\r
-  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,\r
-  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,\r
-  IN UINTN                    CopySize\r
+  IN CONST EFI_PEI_SERVICES  **PeiServices,\r
+  IN EFI_PHYSICAL_ADDRESS    TemporaryMemoryBase,\r
+  IN EFI_PHYSICAL_ADDRESS    PermanentMemoryBase,\r
+  IN UINTN                   CopySize\r
   );\r
 \r
-\r
 /**\r
 \r
   Entry point to the C language phase of SEC. After the SEC assembly\r
@@ -102,12 +103,12 @@ SecTemporaryRamSupport (
 VOID\r
 EFIAPI\r
 SecStartup (\r
-  IN UINT32                   SizeOfRam,\r
-  IN UINT32                   TempRamBase,\r
-  IN VOID                    *BootFirmwareVolume,\r
-  IN PEI_CORE_ENTRY           PeiCore,\r
-  IN UINT32                   BootLoaderStack,\r
-  IN UINT32                   ApiIdx\r
+  IN UINT32          SizeOfRam,\r
+  IN UINT32          TempRamBase,\r
+  IN VOID            *BootFirmwareVolume,\r
+  IN PEI_CORE_ENTRY  PeiCore,\r
+  IN UINTN           BootLoaderStack,\r
+  IN UINT32          ApiIdx\r
   );\r
 \r
 /**\r
@@ -129,9 +130,9 @@ ProcessLibraryConstructorList (
   @return  value of esp.\r
 \r
 **/\r
-UINT32\r
+UINTN\r
 EFIAPI\r
-AsmReadEsp (\r
+AsmReadStackPointer (\r
   VOID\r
   );\r
 \r