--- /dev/null
+/** @file\r
+ Intel FSP API definition from Intel Firmware Support Package External\r
+ Architecture Specification v2.0.\r
+\r
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _FSP_API_H_\r
+#define _FSP_API_H_\r
+\r
+#pragma pack(1)\r
+typedef struct {\r
+ ///\r
+ /// UPD Region Signature. This signature will be\r
+ /// "XXXXXX_T" for FSP-T\r
+ /// "XXXXXX_M" for FSP-M\r
+ /// "XXXXXX_S" for FSP-S\r
+ /// Where XXXXXX is an unique signature\r
+ ///\r
+ UINT64 Signature;\r
+ ///\r
+ /// Revision of the Data structure. For FSP v2.0 value is 1.\r
+ ///\r
+ UINT8 Revision;\r
+ UINT8 Reserved[23];\r
+} FSP_UPD_HEADER;\r
+\r
+typedef struct {\r
+ ///\r
+ /// Revision of the structure. For FSP v2.0 value is 1.\r
+ ///\r
+ UINT8 Revision;\r
+ UINT8 Reserved[3];\r
+ ///\r
+ /// Pointer to the non-volatile storage (NVS) data buffer.\r
+ /// If it is NULL it indicates the NVS data is not available.\r
+ ///\r
+ VOID *NvsBufferPtr;\r
+ ///\r
+ /// Pointer to the temporary stack base address to be\r
+ /// consumed inside FspMemoryInit() API.\r
+ ///\r
+ VOID *StackBase;\r
+ ///\r
+ /// Temporary stack size to be consumed inside\r
+ /// FspMemoryInit() API.\r
+ ///\r
+ UINT32 StackSize;\r
+ ///\r
+ /// Size of memory to be reserved by FSP below "top\r
+ /// of low usable memory" for bootloader usage.\r
+ ///\r
+ UINT32 BootLoaderTolumSize;\r
+ ///\r
+ /// Current boot mode.\r
+ ///\r
+ UINT32 BootMode;\r
+ UINT8 Reserved1[8];\r
+} FSPM_ARCH_UPD;\r
+\r
+typedef struct {\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+} FSPT_UPD_COMMON;\r
+\r
+typedef struct {\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+ FSPM_ARCH_UPD FspmArchUpd;\r
+} FSPM_UPD_COMMON;\r
+\r
+typedef struct {\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+} FSPS_UPD_COMMON;\r
+\r
+typedef enum {\r
+ ///\r
+ /// This stage is notified when the bootloader completes the\r
+ /// PCI enumeration and the resource allocation for the\r
+ /// PCI devices is complete.\r
+ ///\r
+ EnumInitPhaseAfterPciEnumeration = 0x20,\r
+ ///\r
+ /// This stage is notified just before the bootloader hand-off\r
+ /// to the OS loader.\r
+ ///\r
+ EnumInitPhaseReadyToBoot = 0x40,\r
+ ///\r
+ /// This stage is notified just before the firmware/Preboot\r
+ /// environment transfers management of all system resources\r
+ /// to the OS or next level execution environment.\r
+ ///\r
+ EnumInitPhaseEndOfFirmware = 0xF0\r
+} FSP_INIT_PHASE;\r
+\r
+typedef struct {\r
+ ///\r
+ /// Notification phase used for NotifyPhase API\r
+ ///\r
+ FSP_INIT_PHASE Phase;\r
+} NOTIFY_PHASE_PARAMS;\r
+\r
+#pragma pack()\r
+\r
+/**\r
+ This FSP API is called soon after coming out of reset and before memory and stack is\r
+ available. This FSP API will load the microcode update, enable code caching for the\r
+ region specified by the boot loader and also setup a temporary stack to be used until\r
+ main memory is initialized.\r
+\r
+ A hardcoded stack can be set up with the following values, and the "esp" register\r
+ initialized to point to this hardcoded stack.\r
+ 1. The return address where the FSP will return control after setting up a temporary\r
+ stack.\r
+ 2. A pointer to the input parameter structure\r
+\r
+ However, since the stack is in ROM and not writeable, this FSP API cannot be called\r
+ using the "call" instruction, but needs to be jumped to.\r
+\r
+ @param[in] FsptUpdDataPtr Pointer to the FSPT_UPD data structure.\r
+\r
+ @retval EFI_SUCCESS Temporary RAM was initialized successfully.\r
+ @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
+ @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
+ @retval EFI_DEVICE_ERROR Temp RAM initialization failed.\r
+\r
+ If this function is successful, the FSP initializes the ECX and EDX registers to point to\r
+ a temporary but writeable memory range available to the boot loader and returns with\r
+ FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary\r
+ memory range and EDX points to the end of the range. Boot loader is free to use the\r
+ whole range described. Typically the boot loader can reload the ESP register to point\r
+ to the end of this returned range so that it can be used as a standard stack.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *FSP_TEMP_RAM_INIT) (\r
+ IN VOID *FsptUpdDataPtr\r
+ );\r
+\r
+/**\r
+ This FSP API is used to notify the FSP about the different phases in the boot process.\r
+ This allows the FSP to take appropriate actions as needed during different initialization\r
+ phases. The phases will be platform dependent and will be documented with the FSP\r
+ release. The current FSP supports two notify phases:\r
+ Post PCI enumeration\r
+ Ready To Boot\r
+\r
+ @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS\r
+\r
+ @retval EFI_SUCCESS The notification was handled successfully.\r
+ @retval EFI_UNSUPPORTED The notification was not called in the proper order.\r
+ @retval EFI_INVALID_PARAMETER The notification code is invalid.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *FSP_NOTIFY_PHASE) (\r
+ IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr\r
+ );\r
+\r
+/**\r
+ This FSP API is called after TempRamInit and initializes the memory.\r
+ This FSP API accepts a pointer to a data structure that will be platform dependent\r
+ and defined for each FSP binary. This will be documented in Integration guide with\r
+ each FSP release.\r
+ After FspMemInit completes its execution, it passes the pointer to the HobList and\r
+ returns to the boot loader from where it was called. BootLoader is responsible to \r
+ migrate it's stack and data to Memory.\r
+ FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r
+ complete the silicon initialization and provides bootloader an opportunity to get\r
+ control after system memory is available and before the temporary RAM is torn down.\r
+\r
+ @param[in] FspmUpdDataPtr Pointer to the FSPM_UPD data sructure.\r
+ @param[out] HobListPtr Pointer to receive the address of the HOB list.\r
+\r
+ @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
+ @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
+ @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
+ @retval EFI_DEVICE_ERROR FSP initialization failed.\r
+ @retval EFI_OUT_OF_RESOURCES Stack range requested by FSP is not met.\r
+ @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *FSP_MEMORY_INIT) (\r
+ IN VOID *FspmUpdDataPtr,\r
+ OUT VOID **HobListPtr\r
+ );\r
+\r
+\r
+/**\r
+ This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary\r
+ memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure\r
+ that will be platform dependent and defined for each FSP binary. This will be\r
+ documented in Integration Guide.\r
+ FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r
+ complete the silicon initialization and provides bootloader an opportunity to get\r
+ control after system memory is available and before the temporary RAM is torn down.\r
+\r
+ @param[in] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.\r
+ This structure is normally defined in the Integration Guide.\r
+ And if it is not defined in the Integration Guide, pass NULL.\r
+\r
+ @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
+ @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
+ @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
+ @retval EFI_DEVICE_ERROR FSP initialization failed.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *FSP_TEMP_RAM_EXIT) (\r
+ IN VOID *TempRamExitParamPtr\r
+ );\r
+\r
+\r
+/**\r
+ This FSP API is called after TempRamExit API.\r
+ FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the\r
+ silicon initialization.\r
+\r
+ @param[in] FspsUpdDataPtr Pointer to the FSPS_UPD data structure.\r
+ If NULL, FSP will use the default parameters.\r
+\r
+ @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r
+ @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r
+ @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r
+ @retval EFI_DEVICE_ERROR FSP initialization failed.\r
+ @retval FSP_STATUS_RESET_REQUIREDx A reset is reuired. These status codes will not be returned during S3.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *FSP_SILICON_INIT) (\r
+ IN VOID *FspsUpdDataPtr\r
+ );\r
+\r
+#endif\r
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