IntelFsp2Pkg: FSPI_UPD is not mandatory.

[mirror_edk2.git] / IntelFsp2Pkg / Include / FspGlobalData.h

diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/FspGlobalData.h
index cf94f7b6a549d2710ecbfb61de13366e5d56be5a..32c6d460e472aebf1c465e23010a3d93fa704517 100644 (file)
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -42,58 +42,57 @@ typedef struct  {
 #define FSP_PERFORMANCE_DATA_TIMER_MASK  0xFFFFFFFFFFFFFF\r
 \r
 typedef struct  {\r
-  UINT32    Signature;\r
-  UINT8     Version;\r
-  UINT8     Reserved1[3];\r
+  UINT32             Signature;\r
+  UINT8              Version;\r
+  UINT8              Reserved1[3];\r
   ///\r
   /// Offset 0x08\r
   ///\r
-  UINTN     CoreStack;\r
-  UINTN     Reserved2;\r
+  UINTN              CoreStack;\r
+  VOID               *SmmInitUpdPtr;\r
   ///\r
   /// IA32: Offset 0x10; X64: Offset 0x18\r
   ///\r
-  UINT32    StatusCode;\r
-  UINT8     ApiIdx;\r
+  UINT32             StatusCode;\r
+  UINT8              ApiIdx;\r
   ///\r
   /// 0: FSP in API mode; 1: FSP in DISPATCH mode\r
   ///\r
-  UINT8     FspMode;\r
-  UINT8     OnSeparateStack;\r
-  UINT8     Reserved3;\r
-  UINT32    NumberOfPhases;\r
-  UINT32    PhasesExecuted;\r
-  UINT32    Reserved4[8];\r
+  UINT8              FspMode;\r
+  UINT8              OnSeparateStack;\r
+  UINT8              Reserved2;\r
+  UINT32             NumberOfPhases;\r
+  UINT32             PhasesExecuted;\r
+  UINT32             Reserved3[8];\r
   ///\r
   /// IA32: Offset 0x40; X64: Offset 0x48\r
   /// Start of UINTN and pointer section\r
-  /// All UINTN and pointer members must be put in this section\r
-  /// except CoreStack and Reserved2. In addition, the number of\r
-  /// UINTN and pointer members must be even for natural alignment\r
-  /// in both IA32 and X64.\r
+  /// All UINTN and pointer members are put in this section\r
+  /// for maintaining natural alignment for both IA32 and X64 builds.\r
   ///\r
   FSP_PLAT_DATA      PlatformData;\r
   VOID               *TempRamInitUpdPtr;\r
   VOID               *MemoryInitUpdPtr;\r
   VOID               *SiliconInitUpdPtr;\r
-  VOID               *SmmInitUpdPtr;\r
   ///\r
-  /// IA32: Offset 0x68; X64: Offset 0x98\r
+  /// IA32: Offset 0x64; X64: Offset 0x90\r
   /// To store function parameters pointer\r
   /// so it can be retrieved after stack switched.\r
   ///\r
   VOID               *FunctionParameterPtr;\r
   FSP_INFO_HEADER    *FspInfoHeader;\r
   VOID               *UpdDataPtr;\r
-  UINTN              Reserved5;\r
   ///\r
   /// End of UINTN and pointer section\r
+  /// At this point, next field offset must be either *0h or *8h to\r
+  /// meet natural alignment requirement.\r
   ///\r
-  UINT8              Reserved6[16];\r
+  UINT8              Reserved4[16];\r
   UINT32             PerfSig;\r
   UINT16             PerfLen;\r
-  UINT16             Reserved7;\r
+  UINT16             Reserved5;\r
   UINT32             PerfIdx;\r
+  UINT32             Reserved6;\r
   UINT64             PerfData[32];\r
 } FSP_GLOBAL_DATA;\r
 \r