--- /dev/null
+/** @file\r
+ Provide FSP API related function.\r
+\r
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Library/FspWrapperApiLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+\r
+/**\r
+ Wrapper for a thunk to transition from long mode to compatibility mode to execute 32-bit code and then transit back to\r
+ long mode.\r
+\r
+ @param[in] Function The 32bit code entry to be executed.\r
+ @param[in] Param1 The first parameter to pass to 32bit code.\r
+ @param[in] Param2 The second parameter to pass to 32bit code.\r
+\r
+ @return EFI_STATUS.\r
+**/\r
+EFI_STATUS\r
+Execute32BitCode (\r
+ IN UINT64 Function,\r
+ IN UINT64 Param1,\r
+ IN UINT64 Param2\r
+ );\r
+\r
+/**\r
+ Find FSP header pointer.\r
+\r
+ @param[in] FlashFvFspBase Flash address of FSP FV.\r
+\r
+ @return FSP header pointer.\r
+**/\r
+FSP_INFO_HEADER *\r
+EFIAPI\r
+FspFindFspHeader (\r
+ IN EFI_PHYSICAL_ADDRESS FlashFvFspBase\r
+ )\r
+{\r
+ UINT8 *CheckPointer;\r
+\r
+ CheckPointer = (UINT8 *) (UINTN) FlashFvFspBase;\r
+\r
+ if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->Signature != EFI_FVH_SIGNATURE) {\r
+ return NULL;\r
+ }\r
+\r
+ if (((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset != 0) {\r
+ CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->ExtHeaderOffset;\r
+ CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_EXT_HEADER *)CheckPointer)->ExtHeaderSize;\r
+ CheckPointer = (UINT8 *) ALIGN_POINTER (CheckPointer, 8);\r
+ } else {\r
+ CheckPointer = CheckPointer + ((EFI_FIRMWARE_VOLUME_HEADER *)CheckPointer)->HeaderLength;\r
+ }\r
+\r
+\r
+ CheckPointer = CheckPointer + sizeof (EFI_FFS_FILE_HEADER);\r
+\r
+ if (((EFI_RAW_SECTION *)CheckPointer)->Type != EFI_SECTION_RAW) {\r
+ return NULL;\r
+ }\r
+\r
+ CheckPointer = CheckPointer + sizeof (EFI_RAW_SECTION);\r
+\r
+ return (FSP_INFO_HEADER *)CheckPointer;\r
+}\r
+\r
+/**\r
+ Call FSP API - FspNotifyPhase.\r
+\r
+ @param[in] NotifyPhaseParams Address pointer to the NOTIFY_PHASE_PARAMS structure.\r
+\r
+ @return EFI status returned by FspNotifyPhase API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspNotifyPhase (\r
+ IN NOTIFY_PHASE_PARAMS *NotifyPhaseParams\r
+ )\r
+{\r
+ FSP_INFO_HEADER *FspHeader;\r
+ FSP_NOTIFY_PHASE NotifyPhaseApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams, (UINTN)NULL);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Call FSP API - FspMemoryInit.\r
+\r
+ @param[in] FspmUpdDataPtr Address pointer to the FSP_MEMORY_INIT_PARAMS structure.\r
+ @param[out] HobListPtr Address of the HobList pointer.\r
+\r
+ @return EFI status returned by FspMemoryInit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspMemoryInit (\r
+ IN VOID *FspmUpdDataPtr,\r
+ OUT VOID **HobListPtr\r
+ )\r
+{\r
+ FSP_INFO_HEADER *FspHeader;\r
+ FSP_MEMORY_INIT FspMemoryInitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspmUpdDataPtr, (UINTN)HobListPtr);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Call FSP API - TempRamExit.\r
+\r
+ @param[in] TempRamExitParam Address pointer to the TempRamExit parameters structure.\r
+\r
+ @return EFI status returned by TempRamExit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallTempRamExit (\r
+ IN VOID *TempRamExitParam\r
+ )\r
+{\r
+ FSP_INFO_HEADER *FspHeader;\r
+ FSP_TEMP_RAM_EXIT TempRamExitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspmBaseAddress));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam, (UINTN)NULL);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Call FSP API - FspSiliconInit.\r
+\r
+ @param[in] FspsUpdDataPtr Address pointer to the Silicon Init parameters structure.\r
+\r
+ @return EFI status returned by FspSiliconInit API.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CallFspSiliconInit (\r
+ IN VOID *FspsUpdDataPtr\r
+ )\r
+{\r
+ FSP_INFO_HEADER *FspHeader;\r
+ FSP_SILICON_INIT FspSiliconInitApi;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InterruptState;\r
+\r
+ FspHeader = (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspsBaseAddress));\r
+ if (FspHeader == NULL) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
+ InterruptState = SaveAndDisableInterrupts ();\r
+ Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspsUpdDataPtr, (UINTN)NULL);\r
+ SetInterruptState (InterruptState);\r
+\r
+ return Status;\r
+}\r
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