--- /dev/null
+/** @file\r
+ Sample to provide TempRamInitParams data.\r
+\r
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Library/PcdLib.h>\r
+#include <FspEas.h>\r
+\r
+typedef struct {\r
+ UINT32 MicrocodeRegionBase;\r
+ UINT32 MicrocodeRegionSize;\r
+ UINT32 CodeRegionBase;\r
+ UINT32 CodeRegionSize;\r
+} FSPT_CORE_UPD;\r
+\r
+typedef struct {\r
+ FSP_UPD_HEADER FspUpdHeader;\r
+ FSPT_CORE_UPD FsptCoreUpd;\r
+} FSPT_UPD_CORE_DATA;\r
+\r
+GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {\r
+ {\r
+ 0x4450555F54505346,\r
+ 0x00,\r
+ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
+ }\r
+ },\r
+ {\r
+ ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicrocodeOffset)),\r
+ ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicrocodeOffset)),\r
+ FixedPcdGet32 (PcdFlashCodeCacheAddress),\r
+ FixedPcdGet32 (PcdFlashCodeCacheSize),\r
+ }\r
+};\r
+\r