Add IntelFspPkg to support create FSP bin based on EDKII.

[mirror_edk2.git] / IntelFspPkg / FspSecCore / FspSecCore.inf

diff --git a/IntelFspPkg/FspSecCore/FspSecCore.inf b/IntelFspPkg/FspSecCore/FspSecCore.inf
new file mode 100644 (file)
index 0000000..d3ec2fc
--- /dev/null
+++ b/IntelFspPkg/FspSecCore/FspSecCore.inf
@@ -0,0 +1,76 @@
+## @file\r
+#\r
+#  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+#\r
+#  This program and the accompanying materials\r
+#  are licensed and made available under the terms and conditions of the BSD License\r
+#  which accompanies this distribution. The full text of the license may be found at\r
+#  http://opensource.org/licenses/bsd-license.php.\r
+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+##\r
+\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = FspSecCore\r
+  FILE_GUID                      = 1BA0062E-C779-4582-8566-336AE8F78F09\r
+  MODULE_TYPE                    = SEC\r
+  VERSION_STRING                 = 1.0\r
+\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32\r
+#\r
+\r
+[Sources]\r
+  SecMain.c\r
+  SecMain.h\r
+  SecFsp.c\r
+  SecFsp.h\r
+\r
+[Sources.IA32]\r
+  Ia32/ResetVec.asm16 | MSFT\r
+  Ia32/Stack.asm  | MSFT\r
+  Ia32/InitializeFpu.asm  | MSFT\r
+  Ia32/FspApiEntry.asm  | MSFT\r
+\r
+  Ia32/Stacks.s | GCC\r
+  Ia32/InitializeFpu.s | GCC\r
+  Ia32/FspApiEntry.s | GCC\r
+\r
+[Binaries.Ia32]\r
+  RAW|Vtf0/Bin/ResetVec.ia32.raw |GCC\r
+\r
+[Binaries.X64]\r
+  RAW|Vtf0/Bin/ResetVec.x64.raw |GCC\r
+\r
+[Packages]\r
+  MdePkg/MdePkg.dec\r
+  IntelFspPkg/IntelFspPkg.dec\r
+\r
+[LibraryClasses]\r
+  BaseMemoryLib\r
+  DebugLib\r
+  BaseLib\r
+  PciCf8Lib\r
+  SerialPortLib\r
+  FspSwitchStackLib\r
+  FspCommonLib\r
+\r
+[Pcd]\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
+  gIntelFspPkgTokenSpaceGuid.PcdGlobalDataPointerAddress\r
+  gIntelFspPkgTokenSpaceGuid.PcdTemporaryRamBase\r
+  gIntelFspPkgTokenSpaceGuid.PcdTemporaryRamSize\r
+  gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize\r
+\r
+[FixedPcd]\r
+  gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry\r
+  gIntelFspPkgTokenSpaceGuid.PcdFspMaxPerfEntry\r
+\r
+[Ppis]\r
+  gEfiTemporaryRamSupportPpiGuid                # PPI ALWAYS_PRODUCED\r
+\r