]> git.proxmox.com Git - mirror_edk2.git/blobdiff - IntelFspPkg/FspSecCore/SecMain.c
Add IntelFspPkg to support create FSP bin based on EDKII.
[mirror_edk2.git] / IntelFspPkg / FspSecCore / SecMain.c
diff --git a/IntelFspPkg/FspSecCore/SecMain.c b/IntelFspPkg/FspSecCore/SecMain.c
new file mode 100644 (file)
index 0000000..22706c8
--- /dev/null
@@ -0,0 +1,208 @@
+/** @file\r
+\r
+  Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+  This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions of the BSD License\r
+  which accompanies this distribution.  The full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php.\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "SecMain.h"\r
+#include "SecFsp.h"\r
+\r
+EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI gSecTemporaryRamSupportPpi = {\r
+  SecTemporaryRamSupport\r
+};\r
+\r
+EFI_PEI_PPI_DESCRIPTOR            mPeiSecPlatformInformationPpi[] = {\r
+  {\r
+    (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+    &gEfiTemporaryRamSupportPpiGuid,\r
+    &gSecTemporaryRamSupportPpi\r
+  }\r
+};\r
+\r
+//\r
+// These are IDT entries pointing to 08:FFFFFFE4h.\r
+//\r
+UINT64  mIdtEntryTemplate = 0xffff8e000008ffe4ULL;\r
+\r
+/**\r
+\r
+  Entry point to the C language phase of SEC. After the SEC assembly\r
+  code has initialized some temporary memory and set up the stack,\r
+  the control is transferred to this function.\r
+\r
+\r
+  @param[in] SizeOfRam          Size of the temporary memory available for use.\r
+  @param[in] TempRamBase        Base address of tempory ram\r
+  @param[in] BootFirmwareVolume Base address of the Boot Firmware Volume.\r
+\r
+  @return This function never returns.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+SecStartup (\r
+  IN UINT32                   SizeOfRam,\r
+  IN UINT32                   TempRamBase,\r
+  IN VOID                    *BootFirmwareVolume\r
+  )\r
+{\r
+  EFI_SEC_PEI_HAND_OFF        SecCoreData;\r
+  IA32_DESCRIPTOR             IdtDescriptor;\r
+  SEC_IDT_TABLE               IdtTableInStack;\r
+  UINT32                      Index;\r
+  FSP_GLOBAL_DATA             PeiFspData;\r
+  PEI_CORE_ENTRY              PeiCore;\r
+  UINT64                      ExceptionHandler;\r
+\r
+  //\r
+  // Process all libraries constructor function linked to SecCore.\r
+  //\r
+  ProcessLibraryConstructorList ();\r
+\r
+  //\r
+  // Initialize floating point operating environment\r
+  // to be compliant with UEFI spec.\r
+  //\r
+  InitializeFloatingPointUnits ();\r
+\r
+\r
+  // |-------------------|---->\r
+  // |Idt Table          |\r
+  // |-------------------|\r
+  // |PeiService Pointer |    PeiStackSize\r
+  // |-------------------|\r
+  // |                   |\r
+  // |      Stack        |\r
+  // |-------------------|---->\r
+  // |                   |\r
+  // |                   |\r
+  // |      Heap         |    PeiTemporayRamSize\r
+  // |                   |\r
+  // |                   |\r
+  // |-------------------|---->  TempRamBase\r
+  IdtTableInStack.PeiService  = NULL;\r
+  ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate);\r
+  for (Index = 0; Index < SEC_IDT_ENTRY_COUNT; Index ++) {\r
+    CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&ExceptionHandler, sizeof (UINT64));\r
+  }\r
+\r
+  IdtDescriptor.Base  = (UINTN) &IdtTableInStack.IdtTable;\r
+  IdtDescriptor.Limit = (UINT16)(sizeof (IdtTableInStack.IdtTable) - 1);\r
+\r
+  AsmWriteIdtr (&IdtDescriptor);\r
+\r
+  //\r
+  // Iniitalize the global FSP data region\r
+  //\r
+  FspGlobalDataInit (&PeiFspData, &BootFirmwareVolume);\r
+\r
+  //\r
+  // Update the base address and length of Pei temporary memory\r
+  //\r
+  SecCoreData.DataSize               = sizeof (EFI_SEC_PEI_HAND_OFF);\r
+  SecCoreData.BootFirmwareVolumeBase = BootFirmwareVolume;\r
+  SecCoreData.BootFirmwareVolumeSize = (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *)BootFirmwareVolume)->FvLength;\r
+  SecCoreData.TemporaryRamBase       = (VOID*)(UINTN) TempRamBase;\r
+  SecCoreData.TemporaryRamSize       = SizeOfRam;\r
+  SecCoreData.PeiTemporaryRamBase    = SecCoreData.TemporaryRamBase;\r
+  SecCoreData.PeiTemporaryRamSize    = SizeOfRam >> 1;\r
+  SecCoreData.StackBase              = (VOID*)(UINTN)(TempRamBase + SecCoreData.PeiTemporaryRamSize);\r
+  SecCoreData.StackSize              = SizeOfRam >> 1;\r
+\r
+  //\r
+  // Call PeiCore Entry\r
+  //\r
+  PeiCore = (PEI_CORE_ENTRY)(*(UINTN *)((&BootFirmwareVolume) + 1));\r
+  PeiCore (&SecCoreData, mPeiSecPlatformInformationPpi);\r
+\r
+  //\r
+  // Should never be here\r
+  //\r
+  CpuDeadLoop ();\r
+}\r
+\r
+/**\r
+  This service of the TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into\r
+  permanent memory.\r
+\r
+  @param[in] PeiServices            Pointer to the PEI Services Table.\r
+  @param[in] TemporaryMemoryBase    Source Address in temporary memory from which the SEC or PEIM will copy the\r
+                                Temporary RAM contents.\r
+  @param[in] PermanentMemoryBase    Destination Address in permanent memory into which the SEC or PEIM will copy the\r
+                                Temporary RAM contents.\r
+  @param[in] CopySize               Amount of memory to migrate from temporary to permanent memory.\r
+\r
+  @retval EFI_SUCCESS           The data was successfully returned.\r
+  @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when\r
+                                TemporaryMemoryBase > PermanentMemoryBase.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SecTemporaryRamSupport (\r
+  IN CONST EFI_PEI_SERVICES   **PeiServices,\r
+  IN EFI_PHYSICAL_ADDRESS     TemporaryMemoryBase,\r
+  IN EFI_PHYSICAL_ADDRESS     PermanentMemoryBase,\r
+  IN UINTN                    CopySize\r
+  )\r
+{\r
+  IA32_DESCRIPTOR   IdtDescriptor;\r
+  VOID*             OldHeap;\r
+  VOID*             NewHeap;\r
+  VOID*             OldStack;\r
+  VOID*             NewStack;\r
+\r
+  OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;\r
+  NewHeap = (VOID*)((UINTN)PermanentMemoryBase + CopySize / 2);\r
+\r
+  OldStack = (VOID*)((UINTN)TemporaryMemoryBase + CopySize / 2);\r
+  NewStack = (VOID*)(UINTN)PermanentMemoryBase;\r
+\r
+  //\r
+  // Migrate Heap\r
+  //\r
+  CopyMem (NewHeap, OldHeap, CopySize / 2);\r
+\r
+  //\r
+  // Migrate Stack\r
+  //\r
+  CopyMem (NewStack, OldStack, CopySize / 2);\r
+\r
+\r
+  //\r
+  // We need *not* fix the return address because currently,\r
+  // The PeiCore is executed in flash.\r
+  //\r
+\r
+  //\r
+  // Rebase IDT table in permanent memory\r
+  //\r
+  AsmReadIdtr (&IdtDescriptor);\r
+  IdtDescriptor.Base = IdtDescriptor.Base - (UINTN)OldStack + (UINTN)NewStack;\r
+\r
+  AsmWriteIdtr (&IdtDescriptor);\r
+\r
+  //\r
+  // Fixed the FSP data pointer\r
+  //\r
+  FspDataPointerFixUp ((UINTN)NewStack - (UINTN)OldStack);\r
+\r
+  //\r
+  // SecSwitchStack function must be invoked after the memory migration\r
+  // immediatly, also we need fixup the stack change caused by new call into\r
+  // permenent memory.\r
+  //\r
+  SecSwitchStack (\r
+    (UINT32) (UINTN) OldStack,\r
+    (UINT32) (UINTN) NewStack\r
+    );\r
+\r
+  return EFI_SUCCESS;\r
+}\r