/** @file\r
Provide FSP API related function.\r
\r
- Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
EFI_STATUS Status;\r
BOOLEAN InterruptState;\r
\r
- FspInitApi = (FSP_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspInitEntryOffset);\r
+ FspInitApi = (FSP_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspInitEntryOffset);\r
InterruptState = SaveAndDisableInterrupts ();\r
Status = Execute32BitCode ((UINTN)FspInitApi, (UINTN)FspInitParams);\r
SetInterruptState (InterruptState);\r
EFI_STATUS Status;\r
BOOLEAN InterruptState;\r
\r
- NotifyPhaseApi = (FSP_NOTIFY_PHASE)(UINTN)(FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
+ NotifyPhaseApi = (FSP_NOTIFY_PHASE)((UINTN)FspHeader->ImageBase + FspHeader->NotifyPhaseEntryOffset);\r
InterruptState = SaveAndDisableInterrupts ();\r
Status = Execute32BitCode ((UINTN)NotifyPhaseApi, (UINTN)NotifyPhaseParams);\r
SetInterruptState (InterruptState);\r
EFI_STATUS Status;\r
BOOLEAN InterruptState;\r
\r
- FspMemoryInitApi = (FSP_MEMORY_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
+ FspMemoryInitApi = (FSP_MEMORY_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspMemoryInitEntryOffset);\r
InterruptState = SaveAndDisableInterrupts ();\r
Status = Execute32BitCode ((UINTN)FspMemoryInitApi, (UINTN)FspMemoryInitParams);\r
SetInterruptState (InterruptState);\r
EFI_STATUS Status;\r
BOOLEAN InterruptState;\r
\r
- TempRamExitApi = (FSP_TEMP_RAM_EXIT)(UINTN)(FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
+ TempRamExitApi = (FSP_TEMP_RAM_EXIT)((UINTN)FspHeader->ImageBase + FspHeader->TempRamExitEntryOffset);\r
InterruptState = SaveAndDisableInterrupts ();\r
Status = Execute32BitCode ((UINTN)TempRamExitApi, (UINTN)TempRamExitParam);\r
SetInterruptState (InterruptState);\r
EFI_STATUS Status;\r
BOOLEAN InterruptState;\r
\r
- FspSiliconInitApi = (FSP_SILICON_INIT)(UINTN)(FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
+ FspSiliconInitApi = (FSP_SILICON_INIT)((UINTN)FspHeader->ImageBase + FspHeader->FspSiliconInitEntryOffset);\r
InterruptState = SaveAndDisableInterrupts ();\r
Status = Execute32BitCode ((UINTN)FspSiliconInitApi, (UINTN)FspSiliconInitParam);\r
SetInterruptState (InterruptState);\r