\r
#include "Fsp.h"\r
\r
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase)\r
+ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize)\r
+\r
ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)\r
ASM_PFX(_TEXT_REALMODE):\r
#----------------------------------------------------------------------------\r
# Transition to Flat 32 bit protected mode\r
# The jump to a far pointer causes the transition to 32 bit mode\r
#\r
- movl $ProtectedModeEntryLinearAddress, %esi\r
+ movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi\r
jmp *%cs:(%si)\r
\r
ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)\r
ASM_PFX(ProtectedModeEntryPoint):\r
\r
# Find the fsp info header\r
- movl PcdGet32 (PcdFlashFvFspBase), %edi\r
- movl PcdGet32 (PcdFlashFvFspSize), %ecx\r
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase), %edi\r
+ movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize), %ecx\r
\r
movl FVH_SIGINATURE_OFFSET(%edi), %eax\r
cmp $FVH_SIGINATURE_VALID_VALUE, %eax\r
.align 0x10\r
TempRamInitStack:\r
.long TempRamInitDone\r
- .long TempRamInitParams\r
+ .long ASM_PFX(TempRamInitParams)\r
\r
#\r
# ROM-based Global-Descriptor Table for the Tiano PEI Phase\r
\r
ASM_PFX(ProtectedModeEntryLinearAddress):\r
ProtectedModeEntryLinearOffset:\r
- .long ProtectedModeEntryPoint # Offset of our 32 bit code\r
+ .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code\r
.word LINEAR_CODE_SEL\r