IntelSiliconPkg IntelVTdDxe: Fix flush cache issue

[mirror_edk2.git] / IntelSiliconPkg / Feature / VTd / IntelVTdDxe / TranslationTable.c

diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index ccecc9520cf35cc5ae6da4f15be4f907d361df69..bce5a45105d2f97eba408f5209b073f453fc2616 100644 (file)
--- a/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -124,7 +124,6 @@ CreateContextEntry (
       RootEntry->Bits.ContextTablePointerHi  = (UINT32) RShiftU64 ((UINT64)(UINTN)Buffer, 32);\r
       RootEntry->Bits.Present = 1;\r
       Buffer = (UINT8 *)Buffer + EFI_PAGES_TO_SIZE (ContextPages);\r
-      FlushPageTableMemory (VtdIndex, (UINTN)RootEntry, sizeof(*RootEntry));\r
     }\r
 \r
     ContextEntryTable = (VTD_CONTEXT_ENTRY *)(UINTN)VTD_64BITS_ADDRESS(RootEntry->Bits.ContextTablePointerLo, RootEntry->Bits.ContextTablePointerHi) ;\r
@@ -143,9 +142,10 @@ CreateContextEntry (
       ContextEntry->Bits.AddressWidth = 0x2;\r
       break;\r
     }\r
-    FlushPageTableMemory (VtdIndex, (UINTN)ContextEntry, sizeof(*ContextEntry));\r
   }\r
 \r
+  FlushPageTableMemory (VtdIndex, (UINTN)mVtdUnitInformation[VtdIndex].RootEntryTable, EFI_PAGES_TO_SIZE(EntryTablePages));\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
@@ -196,6 +196,7 @@ CreateSecondLevelPagingEntryTable (
       DEBUG ((DEBUG_ERROR,"Could not Alloc LVL4 PT. \n"));\r
       return NULL;\r
     }\r
+    FlushPageTableMemory (VtdIndex, (UINTN)SecondLevelPagingEntry, EFI_PAGES_TO_SIZE(1));\r
   }\r
 \r
   //\r
@@ -219,12 +220,13 @@ CreateSecondLevelPagingEntryTable (
         ASSERT(FALSE);\r
         return NULL;\r
       }\r
+      FlushPageTableMemory (VtdIndex, (UINTN)Lvl4PtEntry[Index4].Uint64, SIZE_4KB);\r
       SetSecondLevelPagingEntryAttribute (&Lvl4PtEntry[Index4], EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE);\r
     }\r
 \r
     Lvl3Start = RShiftU64 (BaseAddress, 30) & 0x1FF;\r
     if (ALIGN_VALUE_LOW(BaseAddress + SIZE_1GB, SIZE_1GB) <= EndAddress) {\r
-      Lvl3End = SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY);\r
+      Lvl3End = SIZE_4KB/sizeof(VTD_SECOND_LEVEL_PAGING_ENTRY) - 1;\r
     } else {\r
       Lvl3End = RShiftU64 (EndAddress - 1, 30) & 0x1FF;\r
     }\r
@@ -239,6 +241,7 @@ CreateSecondLevelPagingEntryTable (
           ASSERT(FALSE);\r
           return NULL;\r
         }\r
+        FlushPageTableMemory (VtdIndex, (UINTN)Lvl3PtEntry[Index3].Uint64, SIZE_4KB);\r
         SetSecondLevelPagingEntryAttribute (&Lvl3PtEntry[Index3], EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE);\r
       }\r
 \r
@@ -249,16 +252,21 @@ CreateSecondLevelPagingEntryTable (
         Lvl2PtEntry[Index2].Bits.PageSize = 1;\r
         BaseAddress += SIZE_2MB;\r
         if (BaseAddress >= MemoryLimit) {\r
-          goto Done;\r
+          break;\r
         }\r
       }\r
       FlushPageTableMemory (VtdIndex, (UINTN)Lvl2PtEntry, SIZE_4KB);\r
+      if (BaseAddress >= MemoryLimit) {\r
+        break;\r
+      }\r
     }\r
     FlushPageTableMemory (VtdIndex, (UINTN)&Lvl3PtEntry[Lvl3Start], (UINTN)&Lvl3PtEntry[Lvl3End + 1] - (UINTN)&Lvl3PtEntry[Lvl3Start]);\r
+    if (BaseAddress >= MemoryLimit) {\r
+      break;\r
+    }\r
   }\r
   FlushPageTableMemory (VtdIndex, (UINTN)&Lvl4PtEntry[Lvl4Start], (UINTN)&Lvl4PtEntry[Lvl4End + 1] - (UINTN)&Lvl4PtEntry[Lvl4Start]);\r
 \r
-Done:\r
   return SecondLevelPagingEntry;\r
 }\r
 \r
@@ -283,9 +291,13 @@ CreateSecondLevelPagingEntry (
   if (SecondLevelPagingEntry == NULL) {\r
     return NULL;\r
   }\r
-  SecondLevelPagingEntry = CreateSecondLevelPagingEntryTable (VtdIndex, SecondLevelPagingEntry, SIZE_4GB, mAbove4GMemoryLimit, IoMmuAccess);\r
-  if (SecondLevelPagingEntry == NULL) {\r
-    return NULL;\r
+\r
+  if (mAbove4GMemoryLimit != 0) {\r
+    ASSERT (mAbove4GMemoryLimit > BASE_4GB);\r
+    SecondLevelPagingEntry = CreateSecondLevelPagingEntryTable (VtdIndex, SecondLevelPagingEntry, SIZE_4GB, mAbove4GMemoryLimit, IoMmuAccess);\r
+    if (SecondLevelPagingEntry == NULL) {\r
+      return NULL;\r
+    }\r
   }\r
 \r
   return SecondLevelPagingEntry;\r
@@ -542,6 +554,7 @@ GetSecondLevelPageTableEntry (
       *PageAttribute = PageNone;\r
       return NULL;\r
     }\r
+    FlushPageTableMemory (VtdIndex, (UINTN)L4PageTable[Index4], SIZE_4KB);\r
     SetSecondLevelPagingEntryAttribute ((VTD_SECOND_LEVEL_PAGING_ENTRY *)&L4PageTable[Index4], EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE);\r
     FlushPageTableMemory (VtdIndex, (UINTN)&L4PageTable[Index4], sizeof(L4PageTable[Index4]));\r
   }\r
@@ -555,6 +568,7 @@ GetSecondLevelPageTableEntry (
       *PageAttribute = PageNone;\r
       return NULL;\r
     }\r
+    FlushPageTableMemory (VtdIndex, (UINTN)L3PageTable[Index3], SIZE_4KB);\r
     SetSecondLevelPagingEntryAttribute ((VTD_SECOND_LEVEL_PAGING_ENTRY *)&L3PageTable[Index3], EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE);\r
     FlushPageTableMemory (VtdIndex, (UINTN)&L3PageTable[Index3], sizeof(L3PageTable[Index3]));\r
   }\r