IntelSiliconPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / IntelSiliconPkg / Include / IndustryStandard / IgdOpRegion.h

diff --git a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
index fd6f813a94d3dd05dc3759c92ba5888950a3727d..f51253580374db385b439c578d29e6bf1ded973d 100644 (file)
--- a/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
+++ b/IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h
@@ -4,16 +4,8 @@
 \r
   https://01.org/sites/default/files/documentation/skl_opregion_rev0p5.pdf\r
 \r
-  @note Fixed bug in the spec Mailbox3 - RM31 size from 0x45(69) to 0x46(70)\r
-\r
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 #ifndef _IGD_OPREGION_H_\r
@@ -31,7 +23,7 @@
   Sub-structures define the different parts of the OpRegion followed by the\r
   main structure representing the entire OpRegion.\r
 \r
-  @note: These structures are packed to 1 byte offsets because the exact\r
+  @note These structures are packed to 1 byte offsets because the exact\r
   data location is required by the supporting design specification due to\r
   the fact that the data is used by ASL and Graphics driver code compiled\r
   separately.\r
@@ -118,7 +110,9 @@ typedef struct {
   UINT64 FDSS;          ///< Offset 0x3AA DSS Buffer address allocated for IFFS feature\r
   UINT32 FDSP;          ///< Offset 0x3B2 Size of DSS buffer\r
   UINT32 STAT;          ///< Offset 0x3B6 State Indicator\r
-  UINT8  RM31[0x46];    ///< Offset 0x3BA - 0x3FF  Reserved Must be zero. Bug in spec 0x45(69)\r
+  UINT64 RVDA;          ///< Offset 0x3BA Physical address of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.\r
+  UINT32 RVDS;          ///< Offset 0x3C2 Size of Raw VBT data. Added from Spec Version 0.90 to support VBT greater than 6KB.\r
+  UINT8  RM32[0x3A];    ///< Offset 0x3C6 - 0x3FF  Reserved Must be zero.\r
 } IGD_OPREGION_MBOX3;\r
 \r
 ///\r