+ ## The mask is used to control VTd behavior.<BR><BR>\r
+ # BIT0: Enable IOMMU during boot (If DMAR table is installed in DXE. If VTD_INFO_PPI is installed in PEI.)\r
+ # BIT1: Enable IOMMU when transfer control to OS (ExitBootService in normal boot. EndOfPEI in S3)\r
+ # @Prompt The policy for VTd driver behavior.\r
+ gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask|1|UINT8|0x00000002\r
+\r
+ ## Declares VTd PEI DMA buffer size.<BR><BR>\r
+ # When this PCD value is referred by platform to calculate the required\r
+ # memory size for PEI (InstallPeiMemory), the PMR alignment requirement\r
+ # needs be considered to be added with this PCD value for alignment\r
+ # adjustment need by AllocateAlignedPages.\r
+ # @Prompt The VTd PEI DMA buffer size.\r
+ gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSize|0x00400000|UINT32|0x00000003\r
+\r
+ ## Declares VTd PEI DMA buffer size for S3.<BR><BR>\r
+ # When this PCD value is referred by platform to calculate the required\r
+ # memory size for PEI S3 (InstallPeiMemory), the PMR alignment requirement\r
+ # needs be considered to be added with this PCD value for alignment\r
+ # adjustment need by AllocateAlignedPages.\r
+ # @Prompt The VTd PEI DMA buffer size for S3.\r
+ gIntelSiliconPkgTokenSpaceGuid.PcdVTdPeiDmaBufferSizeS3|0x00200000|UINT32|0x00000004\r
+\r