MdeModulePkg/AtaAtapiPassThru: Revert patch to disable Bus Master

[mirror_edk2.git] / MdeModulePkg / Bus / Ata / AtaAtapiPassThru / IdeMode.c

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
index 420ad273dc3cea2a0ffdee58102799cbff524ca6..6478f7be07ddd1260ce9d321dab19e4d798617dd 100644 (file)
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/IdeMode.c
@@ -467,9 +467,18 @@ DRQClear2 (
   @param IdeRegisters     A pointer to EFI_IDE_REGISTERS data structure.\r
   @param Timeout          The time to complete the command, uses 100ns as a unit.\r
 \r
-  @retval EFI_SUCCESS          DRQ bit set within the time out.\r
-  @retval EFI_TIMEOUT          DRQ bit not set within the time out.\r
-  @retval EFI_ABORTED          DRQ bit not set caused by the command abort.\r
+  @retval EFI_SUCCESS           BSY bit cleared and DRQ bit set within the\r
+                                timeout.\r
+\r
+  @retval EFI_TIMEOUT           BSY bit not cleared within the timeout.\r
+\r
+  @retval EFI_ABORTED           Polling abandoned due to command abort.\r
+\r
+  @retval EFI_DEVICE_ERROR      Polling abandoned due to a non-abort error.\r
+\r
+  @retval EFI_NOT_READY         BSY bit cleared within timeout, and device\r
+                                reported "command complete" by clearing DRQ\r
+                                bit.\r
 \r
   @note  Read Status Register will clear interrupt status.\r
 \r
@@ -542,9 +551,19 @@ DRQReady (
   @param IdeRegisters     A pointer to EFI_IDE_REGISTERS data structure.\r
   @param Timeout          The time to complete the command, uses 100ns as a unit.\r
 \r
-  @retval EFI_SUCCESS           DRQ bit set within the time out.\r
-  @retval EFI_TIMEOUT           DRQ bit not set within the time out.\r
-  @retval EFI_ABORTED           DRQ bit not set caused by the command abort.\r
+  @retval EFI_SUCCESS           BSY bit cleared and DRQ bit set within the\r
+                                timeout.\r
+\r
+  @retval EFI_TIMEOUT           BSY bit not cleared within the timeout.\r
+\r
+  @retval EFI_ABORTED           Polling abandoned due to command abort.\r
+\r
+  @retval EFI_DEVICE_ERROR      Polling abandoned due to a non-abort error.\r
+\r
+  @retval EFI_NOT_READY         BSY bit cleared within timeout, and device\r
+                                reported "command complete" by clearing DRQ\r
+                                bit.\r
+\r
   @note  Read Alternate Status Register will not clear interrupt status.\r
 \r
 **/\r
@@ -1917,7 +1936,7 @@ AtaPacketReadWrite (
   IN     EFI_PCI_IO_PROTOCOL       *PciIo,\r
   IN     EFI_IDE_REGISTERS         *IdeRegisters,\r
   IN OUT VOID                      *Buffer,\r
-  IN     UINT64                    ByteCount,\r
+  IN OUT UINT32                    *ByteCount,\r
   IN     BOOLEAN                   Read,\r
   IN     UINT64                    Timeout\r
   )\r
@@ -1928,17 +1947,18 @@ AtaPacketReadWrite (
   EFI_STATUS  Status;\r
   UINT16      *PtrBuffer;\r
 \r
+  PtrBuffer         = Buffer;\r
+  RequiredWordCount = *ByteCount >> 1;\r
+\r
   //\r
   // No data transfer is premitted.\r
   //\r
-  if (ByteCount == 0) {\r
+  if (RequiredWordCount == 0) {\r
     return EFI_SUCCESS;\r
   }\r
 \r
-  PtrBuffer         = Buffer;\r
-  RequiredWordCount = (UINT32)RShiftU64(ByteCount, 1);\r
   //\r
-  // ActuralWordCount means the word count of data really transferred.\r
+  // ActualWordCount means the word count of data really transferred.\r
   //\r
   ActualWordCount = 0;\r
 \r
@@ -1949,7 +1969,15 @@ AtaPacketReadWrite (
     //\r
     Status = DRQReady2 (PciIo, IdeRegisters, Timeout);\r
     if (EFI_ERROR (Status)) {\r
-      return CheckStatusRegister (PciIo, IdeRegisters);\r
+      if (Status == EFI_NOT_READY) {\r
+        //\r
+        // Device provided less data than we intended to read, or wanted less\r
+        // data than we intended to write, but it may still be successful.\r
+        //\r
+        break;\r
+      } else {\r
+        return Status;\r
+      }\r
     }\r
 \r
     //\r
@@ -2015,6 +2043,7 @@ AtaPacketReadWrite (
     return EFI_DEVICE_ERROR;\r
   }\r
 \r
+  *ByteCount = ActualWordCount << 1;\r
   return Status;\r
 }\r
 \r
@@ -2113,7 +2142,7 @@ AtaPacketCommandExecute (
                PciIo,\r
                IdeRegisters,\r
                Packet->InDataBuffer,\r
-               Packet->InTransferLength,\r
+               &Packet->InTransferLength,\r
                TRUE,\r
                Packet->Timeout\r
                );\r
@@ -2122,7 +2151,7 @@ AtaPacketCommandExecute (
                PciIo,\r
                IdeRegisters,\r
                Packet->OutDataBuffer,\r
-               Packet->OutTransferLength,\r
+               &Packet->OutTransferLength,\r
                FALSE,\r
                Packet->Timeout\r
                );\r
@@ -2613,6 +2642,11 @@ DetectAndConfigIdeDevice (
   PciIo        = Instance->PciIo;\r
 \r
   for (IdeDevice = 0; IdeDevice < EfiIdeMaxDevice; IdeDevice++) {\r
+    //\r
+    // Select Master or Slave device to get the return signature for ATA DEVICE DIAGNOSTIC cmd.\r
+    //\r
+    IdeWritePortB (PciIo, IdeRegisters->Head, (UINT8)((IdeDevice << 4) | 0xe0));\r
+\r
     //\r
     // Send ATA Device Execut Diagnostic command.\r
     // This command should work no matter DRDY is ready or not\r