USB 2.0 device inserts.\r
\r
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
-\r
#include "Ehci.h"\r
\r
//\r
// to the UEFI protocol's port state (change).\r
//\r
USB_PORT_STATE_MAP mUsbPortStateMap[] = {\r
- {PORTSC_CONN, USB_PORT_STAT_CONNECTION},\r
- {PORTSC_ENABLED, USB_PORT_STAT_ENABLE},\r
- {PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND},\r
- {PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT},\r
- {PORTSC_RESET, USB_PORT_STAT_RESET},\r
- {PORTSC_POWER, USB_PORT_STAT_POWER},\r
- {PORTSC_OWNER, USB_PORT_STAT_OWNER}\r
+ { PORTSC_CONN, USB_PORT_STAT_CONNECTION },\r
+ { PORTSC_ENABLED, USB_PORT_STAT_ENABLE },\r
+ { PORTSC_SUSPEND, USB_PORT_STAT_SUSPEND },\r
+ { PORTSC_OVERCUR, USB_PORT_STAT_OVERCURRENT },\r
+ { PORTSC_RESET, USB_PORT_STAT_RESET },\r
+ { PORTSC_POWER, USB_PORT_STAT_POWER },\r
+ { PORTSC_OWNER, USB_PORT_STAT_OWNER }\r
};\r
\r
USB_PORT_STATE_MAP mUsbPortChangeMap[] = {\r
- {PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION},\r
- {PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE},\r
- {PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT}\r
+ { PORTSC_CONN_CHANGE, USB_PORT_STAT_C_CONNECTION },\r
+ { PORTSC_ENABLE_CHANGE, USB_PORT_STAT_C_ENABLE },\r
+ { PORTSC_OVERCUR_CHANGE, USB_PORT_STAT_C_OVERCURRENT }\r
};\r
\r
EFI_DRIVER_BINDING_PROTOCOL\r
-gEhciDriverBinding = {\r
+ gEhciDriverBinding = {\r
EhcDriverBindingSupported,\r
EhcDriverBindingStart,\r
EhcDriverBindingStop,\r
OUT UINT8 *Is64BitCapable\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
\r
if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
*MaxSpeed = EFI_USB_SPEED_HIGH;\r
- *PortNumber = (UINT8) (Ehc->HcStructParams & HCSP_NPORTS);\r
- *Is64BitCapable = (UINT8) Ehc->Support64BitDma;\r
+ *PortNumber = (UINT8)(Ehc->HcStructParams & HCSP_NPORTS);\r
+ *Is64BitCapable = (UINT8)Ehc->Support64BitDma;\r
\r
- DEBUG ((EFI_D_INFO, "EhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));\r
+ DEBUG ((DEBUG_INFO, "EhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));\r
\r
gBS->RestoreTPL (OldTpl);\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Provides software reset for the USB host controller.\r
\r
EFI_STATUS\r
EFIAPI\r
EhcReset (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT16 Attributes\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT16 Attributes\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
- UINT32 DbgCtrlStatus;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
\r
Ehc = EHC_FROM_THIS (This);\r
\r
);\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
\r
switch (Attributes) {\r
- case EFI_USB_HC_RESET_GLOBAL:\r
- //\r
- // Flow through, same behavior as Host Controller Reset\r
- //\r
- case EFI_USB_HC_RESET_HOST_CONTROLLER:\r
+ case EFI_USB_HC_RESET_GLOBAL:\r
//\r
- // Host Controller must be Halt when Reset it\r
+ // Flow through, same behavior as Host Controller Reset\r
//\r
- if (Ehc->DebugPortNum != 0) {\r
- DbgCtrlStatus = EhcReadDbgRegister(Ehc, 0);\r
- if ((DbgCtrlStatus & (USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_OWNER)) == (USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_OWNER)) {\r
+ case EFI_USB_HC_RESET_HOST_CONTROLLER:\r
+ //\r
+ // Host Controller must be Halt when Reset it\r
+ //\r
+ if (EhcIsDebugPortInUse (Ehc, NULL)) {\r
Status = EFI_SUCCESS;\r
goto ON_EXIT;\r
}\r
- }\r
\r
- if (!EhcIsHalt (Ehc)) {\r
- Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);\r
+ if (!EhcIsHalt (Ehc)) {\r
+ Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);\r
\r
- if (EFI_ERROR (Status)) {\r
- Status = EFI_DEVICE_ERROR;\r
- goto ON_EXIT;\r
+ if (EFI_ERROR (Status)) {\r
+ Status = EFI_DEVICE_ERROR;\r
+ goto ON_EXIT;\r
+ }\r
}\r
- }\r
\r
- //\r
- // Clean up the asynchronous transfers, currently only\r
- // interrupt supports asynchronous operation.\r
- //\r
- EhciDelAllAsyncIntTransfers (Ehc);\r
- EhcAckAllInterrupt (Ehc);\r
- EhcFreeSched (Ehc);\r
+ //\r
+ // Clean up the asynchronous transfers, currently only\r
+ // interrupt supports asynchronous operation.\r
+ //\r
+ EhciDelAllAsyncIntTransfers (Ehc);\r
+ EhcAckAllInterrupt (Ehc);\r
+ EhcFreeSched (Ehc);\r
\r
- Status = EhcResetHC (Ehc, EHC_RESET_TIMEOUT);\r
+ Status = EhcResetHC (Ehc, EHC_RESET_TIMEOUT);\r
\r
- if (EFI_ERROR (Status)) {\r
- goto ON_EXIT;\r
- }\r
+ if (EFI_ERROR (Status)) {\r
+ goto ON_EXIT;\r
+ }\r
\r
- Status = EhcInitHC (Ehc);\r
- break;\r
+ Status = EhcInitHC (Ehc);\r
+ break;\r
\r
- case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:\r
- case EFI_USB_HC_RESET_HOST_WITH_DEBUG:\r
- Status = EFI_UNSUPPORTED;\r
- break;\r
+ case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:\r
+ case EFI_USB_HC_RESET_HOST_WITH_DEBUG:\r
+ Status = EFI_UNSUPPORTED;\r
+ break;\r
\r
- default:\r
- Status = EFI_INVALID_PARAMETER;\r
+ default:\r
+ Status = EFI_INVALID_PARAMETER;\r
}\r
\r
ON_EXIT:\r
- DEBUG ((EFI_D_INFO, "EhcReset: exit status %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "EhcReset: exit status %r\n", Status));\r
gBS->RestoreTPL (OldTpl);\r
return Status;\r
}\r
\r
-\r
/**\r
Retrieve the current state of the USB host controller.\r
\r
OUT EFI_USB_HC_STATE *State\r
)\r
{\r
- EFI_TPL OldTpl;\r
- USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ USB2_HC_DEV *Ehc;\r
\r
if (State == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {\r
*State = EfiUsbHcStateHalt;\r
\r
gBS->RestoreTPL (OldTpl);\r
\r
- DEBUG ((EFI_D_INFO, "EhcGetState: current state %d\n", *State));\r
+ DEBUG ((DEBUG_INFO, "EhcGetState: current state %d\n", *State));\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Sets the USB host controller to a specific state.\r
\r
EFI_STATUS\r
EFIAPI\r
EhcSetState (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN EFI_USB_HC_STATE State\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN EFI_USB_HC_STATE State\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
- EFI_USB_HC_STATE CurState;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
+ EFI_USB_HC_STATE CurState;\r
\r
Status = EhcGetState (This, &CurState);\r
\r
return EFI_SUCCESS;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
switch (State) {\r
- case EfiUsbHcStateHalt:\r
- Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);\r
- break;\r
-\r
- case EfiUsbHcStateOperational:\r
- if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR)) {\r
- Status = EFI_DEVICE_ERROR;\r
+ case EfiUsbHcStateHalt:\r
+ Status = EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);\r
break;\r
- }\r
\r
- //\r
- // Software must not write a one to this field unless the host controller\r
- // is in the Halted state. Doing so will yield undefined results.\r
- // refers to Spec[EHCI1.0-2.3.1]\r
- //\r
- if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {\r
- Status = EFI_DEVICE_ERROR;\r
- break;\r
- }\r
+ case EfiUsbHcStateOperational:\r
+ if (EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_SYS_ERROR)) {\r
+ Status = EFI_DEVICE_ERROR;\r
+ break;\r
+ }\r
+\r
+ //\r
+ // Software must not write a one to this field unless the host controller\r
+ // is in the Halted state. Doing so will yield undefined results.\r
+ // refers to Spec[EHCI1.0-2.3.1]\r
+ //\r
+ if (!EHC_REG_BIT_IS_SET (Ehc, EHC_USBSTS_OFFSET, USBSTS_HALT)) {\r
+ Status = EFI_DEVICE_ERROR;\r
+ break;\r
+ }\r
\r
- Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);\r
- break;\r
+ Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);\r
+ break;\r
\r
- case EfiUsbHcStateSuspend:\r
- Status = EFI_UNSUPPORTED;\r
- break;\r
+ case EfiUsbHcStateSuspend:\r
+ Status = EFI_UNSUPPORTED;\r
+ break;\r
\r
- default:\r
- Status = EFI_INVALID_PARAMETER;\r
+ default:\r
+ Status = EFI_INVALID_PARAMETER;\r
}\r
\r
- DEBUG ((EFI_D_INFO, "EhcSetState: exit status %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "EhcSetState: exit status %r\n", Status));\r
gBS->RestoreTPL (OldTpl);\r
return Status;\r
}\r
\r
-\r
/**\r
Retrieves the current status of a USB root hub port.\r
\r
OUT EFI_USB_PORT_STATUS *PortStatus\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
- UINT32 Offset;\r
- UINT32 State;\r
- UINT32 TotalPort;\r
- UINTN Index;\r
- UINTN MapSize;\r
- EFI_STATUS Status;\r
- UINT32 DbgCtrlStatus;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ UINT32 Offset;\r
+ UINT32 State;\r
+ UINT32 TotalPort;\r
+ UINTN Index;\r
+ UINTN MapSize;\r
+ EFI_STATUS Status;\r
\r
if (PortStatus == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
\r
- Ehc = EHC_FROM_THIS (This);\r
- Status = EFI_SUCCESS;\r
+ Ehc = EHC_FROM_THIS (This);\r
+ Status = EFI_SUCCESS;\r
\r
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);\r
\r
goto ON_EXIT;\r
}\r
\r
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));\r
- PortStatus->PortStatus = 0;\r
- PortStatus->PortChangeStatus = 0;\r
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));\r
+ PortStatus->PortStatus = 0;\r
+ PortStatus->PortChangeStatus = 0;\r
\r
- if ((Ehc->DebugPortNum != 0) && (PortNumber == (Ehc->DebugPortNum - 1))) {\r
- DbgCtrlStatus = EhcReadDbgRegister(Ehc, 0);\r
- if ((DbgCtrlStatus & (USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_OWNER)) == (USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_OWNER)) {\r
- goto ON_EXIT;\r
- }\r
+ if (EhcIsDebugPortInUse (Ehc, &PortNumber)) {\r
+ goto ON_EXIT;\r
}\r
\r
- State = EhcReadOpReg (Ehc, Offset);\r
+ State = EhcReadOpReg (Ehc, Offset);\r
\r
//\r
// Identify device speed. If in K state, it is low speed.\r
//\r
if (EHC_BIT_IS_SET (State, PORTSC_LINESTATE_K)) {\r
PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
-\r
} else if (EHC_BIT_IS_SET (State, PORTSC_ENABLED)) {\r
PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;\r
}\r
\r
for (Index = 0; Index < MapSize; Index++) {\r
if (EHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {\r
- PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);\r
+ PortStatus->PortStatus = (UINT16)(PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);\r
}\r
}\r
\r
\r
for (Index = 0; Index < MapSize; Index++) {\r
if (EHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {\r
- PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);\r
+ PortStatus->PortChangeStatus = (UINT16)(PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);\r
}\r
}\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Sets a feature for the specified root hub port.\r
\r
IN EFI_USB_PORT_FEATURE PortFeature\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
- UINT32 Offset;\r
- UINT32 State;\r
- UINT32 TotalPort;\r
- EFI_STATUS Status;\r
-\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
- Status = EFI_SUCCESS;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ UINT32 Offset;\r
+ UINT32 State;\r
+ UINT32 TotalPort;\r
+ EFI_STATUS Status;\r
+\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
+ Status = EFI_SUCCESS;\r
\r
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);\r
\r
goto ON_EXIT;\r
}\r
\r
- Offset = (UINT32) (EHC_PORT_STAT_OFFSET + (4 * PortNumber));\r
- State = EhcReadOpReg (Ehc, Offset);\r
+ Offset = (UINT32)(EHC_PORT_STAT_OFFSET + (4 * PortNumber));\r
+ State = EhcReadOpReg (Ehc, Offset);\r
\r
//\r
// Mask off the port status change bits, these bits are\r
State &= ~PORTSC_CHANGE_MASK;\r
\r
switch (PortFeature) {\r
- case EfiUsbPortEnable:\r
- //\r
- // Sofeware can't set this bit, Port can only be enable by\r
- // EHCI as a part of the reset and enable\r
- //\r
- State |= PORTSC_ENABLED;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortEnable:\r
+ //\r
+ // Sofeware can't set this bit, Port can only be enable by\r
+ // EHCI as a part of the reset and enable\r
+ //\r
+ State |= PORTSC_ENABLED;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortSuspend:\r
- State |= PORTSC_SUSPEND;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortSuspend:\r
+ State |= PORTSC_SUSPEND;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortReset:\r
- //\r
- // Make sure Host Controller not halt before reset it\r
- //\r
- if (EhcIsHalt (Ehc)) {\r
- Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);\r
+ case EfiUsbPortReset:\r
+ //\r
+ // Make sure Host Controller not halt before reset it\r
+ //\r
+ if (EhcIsHalt (Ehc)) {\r
+ Status = EhcRunHC (Ehc, EHC_GENERIC_TIMEOUT);\r
\r
- if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_INFO, "EhcSetRootHubPortFeature :failed to start HC - %r\n", Status));\r
- break;\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_INFO, "EhcSetRootHubPortFeature :failed to start HC - %r\n", Status));\r
+ break;\r
+ }\r
}\r
- }\r
-\r
- //\r
- // Set one to PortReset bit must also set zero to PortEnable bit\r
- //\r
- State |= PORTSC_RESET;\r
- State &= ~PORTSC_ENABLED;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
\r
- case EfiUsbPortPower:\r
- //\r
- // Set port power bit when PPC is 1\r
- //\r
- if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {\r
- State |= PORTSC_POWER;\r
+ //\r
+ // Set one to PortReset bit must also set zero to PortEnable bit\r
+ //\r
+ State |= PORTSC_RESET;\r
+ State &= ~PORTSC_ENABLED;\r
EhcWriteOpReg (Ehc, Offset, State);\r
- }\r
- break;\r
+ break;\r
\r
- case EfiUsbPortOwner:\r
- State |= PORTSC_OWNER;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortPower:\r
+ //\r
+ // Set port power bit when PPC is 1\r
+ //\r
+ if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {\r
+ State |= PORTSC_POWER;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ }\r
\r
- default:\r
- Status = EFI_INVALID_PARAMETER;\r
+ break;\r
+\r
+ case EfiUsbPortOwner:\r
+ State |= PORTSC_OWNER;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
+\r
+ default:\r
+ Status = EFI_INVALID_PARAMETER;\r
}\r
\r
ON_EXIT:\r
- DEBUG ((EFI_D_INFO, "EhcSetRootHubPortFeature: exit status %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "EhcSetRootHubPortFeature: exit status %r\n", Status));\r
\r
gBS->RestoreTPL (OldTpl);\r
return Status;\r
}\r
\r
-\r
/**\r
Clears a feature for the specified root hub port.\r
\r
IN EFI_USB_PORT_FEATURE PortFeature\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
- UINT32 Offset;\r
- UINT32 State;\r
- UINT32 TotalPort;\r
- EFI_STATUS Status;\r
-\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
- Status = EFI_SUCCESS;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ UINT32 Offset;\r
+ UINT32 State;\r
+ UINT32 TotalPort;\r
+ EFI_STATUS Status;\r
+\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
+ Status = EFI_SUCCESS;\r
\r
TotalPort = (Ehc->HcStructParams & HCSP_NPORTS);\r
\r
goto ON_EXIT;\r
}\r
\r
- Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);\r
- State = EhcReadOpReg (Ehc, Offset);\r
+ Offset = EHC_PORT_STAT_OFFSET + (4 * PortNumber);\r
+ State = EhcReadOpReg (Ehc, Offset);\r
State &= ~PORTSC_CHANGE_MASK;\r
\r
switch (PortFeature) {\r
- case EfiUsbPortEnable:\r
- //\r
- // Clear PORT_ENABLE feature means disable port.\r
- //\r
- State &= ~PORTSC_ENABLED;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
-\r
- case EfiUsbPortSuspend:\r
- //\r
- // A write of zero to this bit is ignored by the host\r
- // controller. The host controller will unconditionally\r
- // set this bit to a zero when:\r
- // 1. software sets the Forct Port Resume bit to a zero from a one.\r
- // 2. software sets the Port Reset bit to a one frome a zero.\r
- //\r
- State &= ~PORSTSC_RESUME;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortEnable:\r
+ //\r
+ // Clear PORT_ENABLE feature means disable port.\r
+ //\r
+ State &= ~PORTSC_ENABLED;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortReset:\r
- //\r
- // Clear PORT_RESET means clear the reset signal.\r
- //\r
- State &= ~PORTSC_RESET;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortSuspend:\r
+ //\r
+ // A write of zero to this bit is ignored by the host\r
+ // controller. The host controller will unconditionally\r
+ // set this bit to a zero when:\r
+ // 1. software sets the Forct Port Resume bit to a zero from a one.\r
+ // 2. software sets the Port Reset bit to a one frome a zero.\r
+ //\r
+ State &= ~PORSTSC_RESUME;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortOwner:\r
- //\r
- // Clear port owner means this port owned by EHC\r
- //\r
- State &= ~PORTSC_OWNER;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortReset:\r
+ //\r
+ // Clear PORT_RESET means clear the reset signal.\r
+ //\r
+ State &= ~PORTSC_RESET;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortConnectChange:\r
- //\r
- // Clear connect status change\r
- //\r
- State |= PORTSC_CONN_CHANGE;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortOwner:\r
+ //\r
+ // Clear port owner means this port owned by EHC\r
+ //\r
+ State &= ~PORTSC_OWNER;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortEnableChange:\r
- //\r
- // Clear enable status change\r
- //\r
- State |= PORTSC_ENABLE_CHANGE;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortConnectChange:\r
+ //\r
+ // Clear connect status change\r
+ //\r
+ State |= PORTSC_CONN_CHANGE;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortOverCurrentChange:\r
- //\r
- // Clear PortOverCurrent change\r
- //\r
- State |= PORTSC_OVERCUR_CHANGE;\r
- EhcWriteOpReg (Ehc, Offset, State);\r
- break;\r
+ case EfiUsbPortEnableChange:\r
+ //\r
+ // Clear enable status change\r
+ //\r
+ State |= PORTSC_ENABLE_CHANGE;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ break;\r
\r
- case EfiUsbPortPower:\r
- //\r
- // Clear port power bit when PPC is 1\r
- //\r
- if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {\r
- State &= ~PORTSC_POWER;\r
+ case EfiUsbPortOverCurrentChange:\r
+ //\r
+ // Clear PortOverCurrent change\r
+ //\r
+ State |= PORTSC_OVERCUR_CHANGE;\r
EhcWriteOpReg (Ehc, Offset, State);\r
- }\r
- break;\r
- case EfiUsbPortSuspendChange:\r
- case EfiUsbPortResetChange:\r
- //\r
- // Not supported or not related operation\r
- //\r
- break;\r
+ break;\r
\r
- default:\r
- Status = EFI_INVALID_PARAMETER;\r
- break;\r
+ case EfiUsbPortPower:\r
+ //\r
+ // Clear port power bit when PPC is 1\r
+ //\r
+ if ((Ehc->HcCapParams & HCSP_PPC) == HCSP_PPC) {\r
+ State &= ~PORTSC_POWER;\r
+ EhcWriteOpReg (Ehc, Offset, State);\r
+ }\r
+\r
+ break;\r
+ case EfiUsbPortSuspendChange:\r
+ case EfiUsbPortResetChange:\r
+ //\r
+ // Not supported or not related operation\r
+ //\r
+ break;\r
+\r
+ default:\r
+ Status = EFI_INVALID_PARAMETER;\r
+ break;\r
}\r
\r
ON_EXIT:\r
- DEBUG ((EFI_D_INFO, "EhcClearRootHubPortFeature: exit status %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "EhcClearRootHubPortFeature: exit status %r\n", Status));\r
gBS->RestoreTPL (OldTpl);\r
return Status;\r
}\r
\r
-\r
/**\r
Submits control transfer to a target USB device.\r
\r
OUT UINT32 *TransferResult\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- URB *Urb;\r
- EFI_TPL OldTpl;\r
- UINT8 Endpoint;\r
- EFI_STATUS Status;\r
+ USB2_HC_DEV *Ehc;\r
+ URB *Urb;\r
+ EFI_TPL OldTpl;\r
+ UINT8 Endpoint;\r
+ EFI_STATUS Status;\r
\r
//\r
// Validate parameters\r
\r
if ((TransferDirection != EfiUsbDataIn) &&\r
(TransferDirection != EfiUsbDataOut) &&\r
- (TransferDirection != EfiUsbNoData)) {\r
+ (TransferDirection != EfiUsbNoData))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
if ((TransferDirection == EfiUsbNoData) &&\r
- ((Data != NULL) || (*DataLength != 0))) {\r
+ ((Data != NULL) || (*DataLength != 0)))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
if ((TransferDirection != EfiUsbNoData) &&\r
- ((Data == NULL) || (*DataLength == 0))) {\r
+ ((Data == NULL) || (*DataLength == 0)))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&\r
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {\r
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
Status = EFI_DEVICE_ERROR;\r
*TransferResult = EFI_USB_ERR_SYSTEM;\r
\r
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {\r
- DEBUG ((EFI_D_ERROR, "EhcControlTransfer: HC halted at entrance\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcControlTransfer: HC halted at entrance\n"));\r
\r
EhcAckAllInterrupt (Ehc);\r
goto ON_EXIT;\r
// endpoint is bidirectional. EhcCreateUrb expects this\r
// combination of Ep addr and its direction.\r
//\r
- Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));\r
- Urb = EhcCreateUrb (\r
- Ehc,\r
- DeviceAddress,\r
- Endpoint,\r
- DeviceSpeed,\r
- 0,\r
- MaximumPacketLength,\r
- Translator,\r
- EHC_CTRL_TRANSFER,\r
- Request,\r
- Data,\r
- *DataLength,\r
- NULL,\r
- NULL,\r
- 1\r
- );\r
+ Endpoint = (UINT8)(0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));\r
+ Urb = EhcCreateUrb (\r
+ Ehc,\r
+ DeviceAddress,\r
+ Endpoint,\r
+ DeviceSpeed,\r
+ 0,\r
+ MaximumPacketLength,\r
+ Translator,\r
+ EHC_CTRL_TRANSFER,\r
+ Request,\r
+ Data,\r
+ *DataLength,\r
+ NULL,\r
+ NULL,\r
+ 1\r
+ );\r
\r
if (Urb == NULL) {\r
- DEBUG ((EFI_D_ERROR, "EhcControlTransfer: failed to create URB"));\r
+ DEBUG ((DEBUG_ERROR, "EhcControlTransfer: failed to create URB"));\r
\r
Status = EFI_OUT_OF_RESOURCES;\r
goto ON_EXIT;\r
gBS->RestoreTPL (OldTpl);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));\r
+ DEBUG ((DEBUG_ERROR, "EhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));\r
}\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Submits bulk transfer to a bulk endpoint of a USB device.\r
\r
OUT UINT32 *TransferResult\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- URB *Urb;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
+ USB2_HC_DEV *Ehc;\r
+ URB *Urb;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
\r
//\r
// Validate the parameters\r
//\r
if ((DataLength == NULL) || (*DataLength == 0) ||\r
- (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {\r
+ (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
\r
if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||\r
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||\r
- ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512))) {\r
+ ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
*TransferResult = EFI_USB_ERR_SYSTEM;\r
Status = EFI_DEVICE_ERROR;\r
\r
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {\r
- DEBUG ((EFI_D_ERROR, "EhcBulkTransfer: HC is halted\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcBulkTransfer: HC is halted\n"));\r
\r
EhcAckAllInterrupt (Ehc);\r
goto ON_EXIT;\r
);\r
\r
if (Urb == NULL) {\r
- DEBUG ((EFI_D_ERROR, "EhcBulkTransfer: failed to create URB\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcBulkTransfer: failed to create URB\n"));\r
\r
Status = EFI_OUT_OF_RESOURCES;\r
goto ON_EXIT;\r
gBS->RestoreTPL (OldTpl);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));\r
+ DEBUG ((DEBUG_ERROR, "EhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));\r
}\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Submits an asynchronous interrupt transfer to an\r
interrupt endpoint of a USB device.\r
EFI_STATUS\r
EFIAPI\r
EhcAsyncInterruptTransfer (\r
- IN EFI_USB2_HC_PROTOCOL * This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN BOOLEAN IsNewTransfer,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN PollingInterval,\r
- IN UINTN DataLength,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR * Translator,\r
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
- IN VOID *Context OPTIONAL\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 DeviceAddress,\r
+ IN UINT8 EndPointAddress,\r
+ IN UINT8 DeviceSpeed,\r
+ IN UINTN MaximumPacketLength,\r
+ IN BOOLEAN IsNewTransfer,\r
+ IN OUT UINT8 *DataToggle,\r
+ IN UINTN PollingInterval,\r
+ IN UINTN DataLength,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
+ IN VOID *Context OPTIONAL\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- URB *Urb;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
- UINT8 *Data;\r
+ USB2_HC_DEV *Ehc;\r
+ URB *Urb;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
\r
//\r
// Validate parameters\r
}\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
//\r
// Delete Async interrupt transfer request. DataToggle will return\r
if (!IsNewTransfer) {\r
Status = EhciDelAsyncIntTransfer (Ehc, DeviceAddress, EndPointAddress, DataToggle);\r
\r
- DEBUG ((EFI_D_INFO, "EhcAsyncInterruptTransfer: remove old transfer - %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "EhcAsyncInterruptTransfer: remove old transfer - %r\n", Status));\r
goto ON_EXIT;\r
}\r
\r
Status = EFI_SUCCESS;\r
\r
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {\r
- DEBUG ((EFI_D_ERROR, "EhcAsyncInterruptTransfer: HC is halt\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcAsyncInterruptTransfer: HC is halt\n"));\r
EhcAckAllInterrupt (Ehc);\r
\r
Status = EFI_DEVICE_ERROR;\r
\r
EhcAckAllInterrupt (Ehc);\r
\r
- Data = AllocatePool (DataLength);\r
-\r
- if (Data == NULL) {\r
- DEBUG ((EFI_D_ERROR, "EhcAsyncInterruptTransfer: failed to allocate buffer\n"));\r
-\r
- Status = EFI_OUT_OF_RESOURCES;\r
- goto ON_EXIT;\r
- }\r
-\r
- Urb = EhcCreateUrb (\r
+ Urb = EhciInsertAsyncIntTransfer (\r
Ehc,\r
DeviceAddress,\r
EndPointAddress,\r
*DataToggle,\r
MaximumPacketLength,\r
Translator,\r
- EHC_INT_TRANSFER_ASYNC,\r
- NULL,\r
- Data,\r
DataLength,\r
CallBackFunction,\r
Context,\r
);\r
\r
if (Urb == NULL) {\r
- DEBUG ((EFI_D_ERROR, "EhcAsyncInterruptTransfer: failed to create URB\n"));\r
-\r
- gBS->FreePool (Data);\r
Status = EFI_OUT_OF_RESOURCES;\r
goto ON_EXIT;\r
}\r
\r
- //\r
- // New asynchronous transfer must inserted to the head.\r
- // Check the comments in EhcMoniteAsyncRequests\r
- //\r
- EhcLinkQhToPeriod (Ehc, Urb->Qh);\r
- InsertHeadList (&Ehc->AsyncIntTransfers, &Urb->UrbList);\r
-\r
ON_EXIT:\r
Ehc->PciIo->Flush (Ehc->PciIo);\r
gBS->RestoreTPL (OldTpl);\r
return Status;\r
}\r
\r
-\r
/**\r
Submits synchronous interrupt transfer to an interrupt endpoint\r
of a USB device.\r
OUT UINT32 *TransferResult\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_TPL OldTpl;\r
- URB *Urb;\r
- EFI_STATUS Status;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_TPL OldTpl;\r
+ URB *Urb;\r
+ EFI_STATUS Status;\r
\r
//\r
// Validates parameters\r
//\r
if ((DataLength == NULL) || (*DataLength == 0) ||\r
- (Data == NULL) || (TransferResult == NULL)) {\r
+ (Data == NULL) || (TransferResult == NULL))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
\r
if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||\r
((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||\r
- ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {\r
+ ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072)))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (EHC_TPL);\r
- Ehc = EHC_FROM_THIS (This);\r
+ OldTpl = gBS->RaiseTPL (EHC_TPL);\r
+ Ehc = EHC_FROM_THIS (This);\r
\r
*TransferResult = EFI_USB_ERR_SYSTEM;\r
Status = EFI_DEVICE_ERROR;\r
\r
if (EhcIsHalt (Ehc) || EhcIsSysError (Ehc)) {\r
- DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));\r
\r
EhcAckAllInterrupt (Ehc);\r
goto ON_EXIT;\r
);\r
\r
if (Urb == NULL) {\r
- DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: failed to create URB\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcSyncInterruptTransfer: failed to create URB\n"));\r
\r
Status = EFI_OUT_OF_RESOURCES;\r
goto ON_EXIT;\r
gBS->RestoreTPL (OldTpl);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));\r
+ DEBUG ((DEBUG_ERROR, "EhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));\r
}\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Submits isochronous transfer to a target USB device.\r
\r
return EFI_UNSUPPORTED;\r
}\r
\r
-\r
/**\r
Submits Async isochronous transfer to a target USB device.\r
\r
EFI_STATUS\r
EFIAPI\r
EhcDriverEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
return EfiLibInstallDriverBindingComponentName2 (\r
);\r
}\r
\r
-\r
/**\r
Test to see if this driver supports ControllerHandle. Any\r
ControllerHandle that has Usb2HcProtocol installed will\r
EFI_STATUS\r
EFIAPI\r
EhcDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- USB_CLASSC UsbClassCReg;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ USB_CLASSC UsbClassCReg;\r
\r
//\r
// Test whether there is PCI IO Protocol attached on the controller handle.\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
+ (VOID **)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
//\r
// Test whether the controller belongs to Ehci type\r
//\r
- if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) || (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB)\r
- || ((UsbClassCReg.ProgInterface != PCI_IF_EHCI) && (UsbClassCReg.ProgInterface != PCI_IF_UHCI) && (UsbClassCReg.ProgInterface != PCI_IF_OHCI))) {\r
-\r
+ if ( (UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) || (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB)\r
+ || ((UsbClassCReg.ProgInterface != PCI_IF_EHCI) && (UsbClassCReg.ProgInterface != PCI_IF_UHCI) && (UsbClassCReg.ProgInterface != PCI_IF_OHCI)))\r
+ {\r
Status = EFI_UNSUPPORTED;\r
}\r
\r
**/\r
EFI_STATUS\r
EhcGetUsbDebugPortInfo (\r
- IN USB2_HC_DEV *Ehc\r
- )\r
+ IN USB2_HC_DEV *Ehc\r
+ )\r
{\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- UINT16 PciStatus;\r
- UINT8 CapabilityPtr;\r
- UINT8 CapabilityId;\r
- UINT16 DebugPort;\r
- EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT16 PciStatus;\r
+ UINT8 CapabilityPtr;\r
+ UINT8 CapabilityId;\r
+ UINT16 DebugPort;\r
+ EFI_STATUS Status;\r
\r
ASSERT (Ehc->PciIo != NULL);\r
PciIo = Ehc->PciIo;\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Create and initialize a USB2_HC_DEV.\r
\r
IN UINT64 OriginalPciAttributes\r
)\r
{\r
- USB2_HC_DEV *Ehc;\r
- EFI_STATUS Status;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_STATUS Status;\r
\r
Ehc = AllocateZeroPool (sizeof (USB2_HC_DEV));\r
\r
//\r
// Init EFI_USB2_HC_PROTOCOL interface and private data structure\r
//\r
- Ehc->Signature = USB2_HC_DEV_SIGNATURE;\r
-\r
- Ehc->Usb2Hc.GetCapability = EhcGetCapability;\r
- Ehc->Usb2Hc.Reset = EhcReset;\r
- Ehc->Usb2Hc.GetState = EhcGetState;\r
- Ehc->Usb2Hc.SetState = EhcSetState;\r
- Ehc->Usb2Hc.ControlTransfer = EhcControlTransfer;\r
- Ehc->Usb2Hc.BulkTransfer = EhcBulkTransfer;\r
- Ehc->Usb2Hc.AsyncInterruptTransfer = EhcAsyncInterruptTransfer;\r
- Ehc->Usb2Hc.SyncInterruptTransfer = EhcSyncInterruptTransfer;\r
- Ehc->Usb2Hc.IsochronousTransfer = EhcIsochronousTransfer;\r
- Ehc->Usb2Hc.AsyncIsochronousTransfer = EhcAsyncIsochronousTransfer;\r
- Ehc->Usb2Hc.GetRootHubPortStatus = EhcGetRootHubPortStatus;\r
- Ehc->Usb2Hc.SetRootHubPortFeature = EhcSetRootHubPortFeature;\r
- Ehc->Usb2Hc.ClearRootHubPortFeature = EhcClearRootHubPortFeature;\r
- Ehc->Usb2Hc.MajorRevision = 0x2;\r
- Ehc->Usb2Hc.MinorRevision = 0x0;\r
+ Ehc->Signature = USB2_HC_DEV_SIGNATURE;\r
+\r
+ Ehc->Usb2Hc.GetCapability = EhcGetCapability;\r
+ Ehc->Usb2Hc.Reset = EhcReset;\r
+ Ehc->Usb2Hc.GetState = EhcGetState;\r
+ Ehc->Usb2Hc.SetState = EhcSetState;\r
+ Ehc->Usb2Hc.ControlTransfer = EhcControlTransfer;\r
+ Ehc->Usb2Hc.BulkTransfer = EhcBulkTransfer;\r
+ Ehc->Usb2Hc.AsyncInterruptTransfer = EhcAsyncInterruptTransfer;\r
+ Ehc->Usb2Hc.SyncInterruptTransfer = EhcSyncInterruptTransfer;\r
+ Ehc->Usb2Hc.IsochronousTransfer = EhcIsochronousTransfer;\r
+ Ehc->Usb2Hc.AsyncIsochronousTransfer = EhcAsyncIsochronousTransfer;\r
+ Ehc->Usb2Hc.GetRootHubPortStatus = EhcGetRootHubPortStatus;\r
+ Ehc->Usb2Hc.SetRootHubPortFeature = EhcSetRootHubPortFeature;\r
+ Ehc->Usb2Hc.ClearRootHubPortFeature = EhcClearRootHubPortFeature;\r
+ Ehc->Usb2Hc.MajorRevision = 0x2;\r
+ Ehc->Usb2Hc.MinorRevision = 0x0;\r
\r
Ehc->PciIo = PciIo;\r
Ehc->DevicePath = DevicePath;\r
Ehc->HcCapParams = EhcReadCapRegister (Ehc, EHC_HCCPARAMS_OFFSET);\r
Ehc->CapLen = EhcReadCapRegister (Ehc, EHC_CAPLENGTH_OFFSET) & 0x0FF;\r
\r
- DEBUG ((EFI_D_INFO, "EhcCreateUsb2Hc: capability length %d\n", Ehc->CapLen));\r
+ DEBUG ((DEBUG_INFO, "EhcCreateUsb2Hc: capability length %d\n", Ehc->CapLen));\r
\r
//\r
// EHCI Controllers with a CapLen of 0 are ignored.\r
VOID\r
EFIAPI\r
EhcExitBootService (\r
- EFI_EVENT Event,\r
- VOID *Context\r
+ EFI_EVENT Event,\r
+ VOID *Context\r
)\r
\r
{\r
- USB2_HC_DEV *Ehc;\r
+ USB2_HC_DEV *Ehc;\r
\r
- Ehc = (USB2_HC_DEV *) Context;\r
+ Ehc = (USB2_HC_DEV *)Context;\r
\r
//\r
// Reset the Host Controller\r
EhcResetHC (Ehc, EHC_RESET_TIMEOUT);\r
}\r
\r
-\r
/**\r
Starting the Usb EHCI Driver.\r
\r
EFI_STATUS\r
EFIAPI\r
EhcDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
)\r
{\r
- EFI_STATUS Status;\r
- USB2_HC_DEV *Ehc;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- EFI_PCI_IO_PROTOCOL *Instance;\r
- UINT64 Supports;\r
- UINT64 OriginalPciAttributes;\r
- BOOLEAN PciAttributesSaved;\r
- USB_CLASSC UsbClassCReg;\r
- EFI_HANDLE *HandleBuffer;\r
- UINTN NumberOfHandles;\r
- UINTN Index;\r
- UINTN CompanionSegmentNumber;\r
- UINTN CompanionBusNumber;\r
- UINTN CompanionDeviceNumber;\r
- UINTN CompanionFunctionNumber;\r
- UINTN EhciSegmentNumber;\r
- UINTN EhciBusNumber;\r
- UINTN EhciDeviceNumber;\r
- UINTN EhciFunctionNumber;\r
- UINT32 State;\r
+ EFI_STATUS Status;\r
+ USB2_HC_DEV *Ehc;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_PCI_IO_PROTOCOL *Instance;\r
+ UINT64 Supports;\r
+ UINT64 OriginalPciAttributes;\r
+ BOOLEAN PciAttributesSaved;\r
+ USB_CLASSC UsbClassCReg;\r
+ EFI_HANDLE *HandleBuffer;\r
+ UINTN NumberOfHandles;\r
+ UINTN Index;\r
+ UINTN CompanionSegmentNumber;\r
+ UINTN CompanionBusNumber;\r
+ UINTN CompanionDeviceNumber;\r
+ UINTN CompanionFunctionNumber;\r
+ UINTN EhciSegmentNumber;\r
+ UINTN EhciBusNumber;\r
+ UINTN EhciDeviceNumber;\r
+ UINTN EhciFunctionNumber;\r
EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;\r
\r
//\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
+ (VOID **)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
// Open Device Path Protocol for on USB host controller\r
//\r
HcDevicePath = NULL;\r
- Status = gBS->OpenProtocol (\r
- Controller,\r
- &gEfiDevicePathProtocolGuid,\r
- (VOID **) &HcDevicePath,\r
- This->DriverBindingHandle,\r
- Controller,\r
- EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
- );\r
+ Status = gBS->OpenProtocol (\r
+ Controller,\r
+ &gEfiDevicePathProtocolGuid,\r
+ (VOID **)&HcDevicePath,\r
+ This->DriverBindingHandle,\r
+ Controller,\r
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
+ );\r
\r
PciAttributesSaved = FALSE;\r
//\r
if (EFI_ERROR (Status)) {\r
goto CLOSE_PCIIO;\r
}\r
+\r
PciAttributesSaved = TRUE;\r
\r
Status = PciIo->Attributes (\r
);\r
if (!EFI_ERROR (Status)) {\r
Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationEnable,\r
- Supports,\r
- NULL\r
- );\r
+ Status = PciIo->Attributes (\r
+ PciIo,\r
+ EfiPciIoAttributeOperationEnable,\r
+ Supports,\r
+ NULL\r
+ );\r
}\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcDriverBindingStart: failed to enable controller\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcDriverBindingStart: failed to enable controller\n"));\r
goto CLOSE_PCIIO;\r
}\r
\r
Status = EFI_UNSUPPORTED;\r
goto CLOSE_PCIIO;\r
}\r
+\r
//\r
// Determine if the device is UHCI or OHCI host controller or not. If yes, then find out the\r
// companion usb ehci host controller and force EHCI driver get attached to it before\r
// UHCI or OHCI driver attaches to UHCI or OHCI host controller.\r
//\r
- if ((UsbClassCReg.ProgInterface == PCI_IF_UHCI || UsbClassCReg.ProgInterface == PCI_IF_OHCI) &&\r
- (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&\r
- (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB)) {\r
+ if (((UsbClassCReg.ProgInterface == PCI_IF_UHCI) || (UsbClassCReg.ProgInterface == PCI_IF_OHCI)) &&\r
+ (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&\r
+ (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB))\r
+ {\r
Status = PciIo->GetLocation (\r
- PciIo,\r
- &CompanionSegmentNumber,\r
- &CompanionBusNumber,\r
- &CompanionDeviceNumber,\r
- &CompanionFunctionNumber\r
- );\r
+ PciIo,\r
+ &CompanionSegmentNumber,\r
+ &CompanionBusNumber,\r
+ &CompanionDeviceNumber,\r
+ &CompanionFunctionNumber\r
+ );\r
if (EFI_ERROR (Status)) {\r
goto CLOSE_PCIIO;\r
}\r
// Get the device path on this handle\r
//\r
Status = gBS->HandleProtocol (\r
- HandleBuffer[Index],\r
- &gEfiPciIoProtocolGuid,\r
- (VOID **)&Instance\r
- );\r
+ HandleBuffer[Index],\r
+ &gEfiPciIoProtocolGuid,\r
+ (VOID **)&Instance\r
+ );\r
ASSERT_EFI_ERROR (Status);\r
\r
Status = Instance->Pci.Read (\r
- Instance,\r
- EfiPciIoWidthUint8,\r
- PCI_CLASSCODE_OFFSET,\r
- sizeof (USB_CLASSC) / sizeof (UINT8),\r
- &UsbClassCReg\r
- );\r
+ Instance,\r
+ EfiPciIoWidthUint8,\r
+ PCI_CLASSCODE_OFFSET,\r
+ sizeof (USB_CLASSC) / sizeof (UINT8),\r
+ &UsbClassCReg\r
+ );\r
\r
if (EFI_ERROR (Status)) {\r
Status = EFI_UNSUPPORTED;\r
}\r
\r
if ((UsbClassCReg.ProgInterface == PCI_IF_EHCI) &&\r
- (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&\r
- (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB)) {\r
+ (UsbClassCReg.BaseCode == PCI_CLASS_SERIAL) &&\r
+ (UsbClassCReg.SubClassCode == PCI_CLASS_SERIAL_USB))\r
+ {\r
Status = Instance->GetLocation (\r
- Instance,\r
- &EhciSegmentNumber,\r
- &EhciBusNumber,\r
- &EhciDeviceNumber,\r
- &EhciFunctionNumber\r
- );\r
+ Instance,\r
+ &EhciSegmentNumber,\r
+ &EhciBusNumber,\r
+ &EhciDeviceNumber,\r
+ &EhciFunctionNumber\r
+ );\r
if (EFI_ERROR (Status)) {\r
goto CLOSE_PCIIO;\r
}\r
+\r
//\r
// Currently, the judgment on the companion usb host controller is through the\r
// same bus number, which may vary on different platform.\r
//\r
if (EhciBusNumber == CompanionBusNumber) {\r
gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Controller\r
- );\r
- EhcDriverBindingStart(This, HandleBuffer[Index], NULL);\r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
+ Controller\r
+ );\r
+ EhcDriverBindingStart (This, HandleBuffer[Index], NULL);\r
}\r
}\r
}\r
+\r
Status = EFI_NOT_FOUND;\r
goto CLOSE_PCIIO;\r
}\r
Ehc = EhcCreateUsb2Hc (PciIo, HcDevicePath, OriginalPciAttributes);\r
\r
if (Ehc == NULL) {\r
- DEBUG ((EFI_D_ERROR, "EhcDriverBindingStart: failed to create USB2_HC\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcDriverBindingStart: failed to create USB2_HC\n"));\r
\r
Status = EFI_OUT_OF_RESOURCES;\r
goto CLOSE_PCIIO;\r
if (!EFI_ERROR (Status)) {\r
Ehc->Support64BitDma = TRUE;\r
} else {\r
- DEBUG ((EFI_D_WARN,\r
+ DEBUG ((\r
+ DEBUG_WARN,\r
"%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",\r
- __FUNCTION__, Controller, Status));\r
+ __FUNCTION__,\r
+ Controller,\r
+ Status\r
+ ));\r
}\r
}\r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcDriverBindingStart: failed to install USB2_HC Protocol\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcDriverBindingStart: failed to install USB2_HC Protocol\n"));\r
goto FREE_POOL;\r
}\r
\r
EhcClearLegacySupport (Ehc);\r
}\r
\r
- if (Ehc->DebugPortNum != 0) {\r
- State = EhcReadDbgRegister(Ehc, 0);\r
- if ((State & (USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_OWNER)) != (USB_DEBUG_PORT_IN_USE | USB_DEBUG_PORT_OWNER)) {\r
- EhcResetHC (Ehc, EHC_RESET_TIMEOUT);\r
- }\r
+ if (!EhcIsDebugPortInUse (Ehc, NULL)) {\r
+ EhcResetHC (Ehc, EHC_RESET_TIMEOUT);\r
}\r
\r
Status = EhcInitHC (Ehc);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcDriverBindingStart: failed to init host controller\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcDriverBindingStart: failed to init host controller\n"));\r
goto UNINSTALL_USBHC;\r
}\r
\r
Status = gBS->SetTimer (Ehc->PollTimer, TimerPeriodic, EHC_ASYNC_POLL_INTERVAL);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "EhcDriverBindingStart: failed to start async interrupt monitor\n"));\r
+ DEBUG ((DEBUG_ERROR, "EhcDriverBindingStart: failed to start async interrupt monitor\n"));\r
\r
EhcHaltHC (Ehc, EHC_GENERIC_TIMEOUT);\r
goto UNINSTALL_USBHC;\r
FALSE\r
);\r
\r
-\r
- DEBUG ((EFI_D_INFO, "EhcDriverBindingStart: EHCI started for controller @ %p\n", Controller));\r
+ DEBUG ((DEBUG_INFO, "EhcDriverBindingStart: EHCI started for controller @ %p\n", Controller));\r
return EFI_SUCCESS;\r
\r
UNINSTALL_USBHC:\r
// Restore original PCI attributes\r
//\r
PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSet,\r
- OriginalPciAttributes,\r
- NULL\r
- );\r
+ PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ OriginalPciAttributes,\r
+ NULL\r
+ );\r
}\r
\r
gBS->CloseProtocol (\r
return Status;\r
}\r
\r
-\r
/**\r
Stop this driver on ControllerHandle. Support stopping any child handles\r
created by this driver.\r
EFI_STATUS\r
EFIAPI\r
EhcDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN UINTN NumberOfChildren,\r
+ IN EFI_HANDLE *ChildHandleBuffer\r
)\r
{\r
EFI_STATUS Status;\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiUsb2HcProtocolGuid,\r
- (VOID **) &Usb2Hc,\r
+ (VOID **)&Usb2Hc,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
// Restore original PCI attributes\r
//\r
PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSet,\r
- Ehc->OriginalPciAttributes,\r
- NULL\r
- );\r
+ PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ Ehc->OriginalPciAttributes,\r
+ NULL\r
+ );\r
\r
gBS->CloseProtocol (\r
Controller,\r
\r
return EFI_SUCCESS;\r
}\r
-\r
projects / mirror_edk2.git / blobdiff