\r
Provides some data struct used by EHCI controller driver.\r
\r
-Copyright (c) 2006 - 2009, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
#include <Protocol/Usb2HostController.h>\r
#include <Protocol/PciIo.h>\r
\r
+#include <Guid/EventGroup.h>\r
+\r
#include <Library/DebugLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/UefiDriverEntryPoint.h>\r
#include <Library/BaseLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PcdLib.h>\r
+#include <Library/ReportStatusCodeLib.h>\r
\r
-#include <IndustryStandard/Pci22.h>\r
+#include <IndustryStandard/Pci.h>\r
\r
typedef struct _USB2_HC_DEV USB2_HC_DEV;\r
\r
#include "EhciDebug.h"\r
#include "ComponentName.h"\r
\r
-typedef enum {\r
- EHC_1_MICROSECOND = 1,\r
- EHC_1_MILLISECOND = 1000 * EHC_1_MICROSECOND,\r
- EHC_1_SECOND = 1000 * EHC_1_MILLISECOND,\r
+//\r
+// EHC timeout experience values\r
+//\r
\r
- //\r
- // EHCI register operation timeout, set by experience\r
- //\r
- EHC_RESET_TIMEOUT = 1 * EHC_1_SECOND,\r
- EHC_GENERIC_TIMEOUT = 10 * EHC_1_MILLISECOND,\r
+#define EHC_1_MICROSECOND 1\r
+#define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)\r
+#define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)\r
\r
- //\r
- // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]\r
- //\r
- EHC_ROOT_PORT_RECOVERY_STALL = 20 * EHC_1_MILLISECOND,\r
+//\r
+// EHCI register operation timeout, set by experience\r
+//\r
+#define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)\r
+#define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)\r
\r
- //\r
- // Sync and Async transfer polling interval, set by experience,\r
- // and the unit of Async is 100us, means 50ms as interval.\r
- //\r
- EHC_SYNC_POLL_INTERVAL = 20 * EHC_1_MICROSECOND,\r
- EHC_ASYNC_POLL_INTERVAL = 50 * 10000U\r
-} EHC_TIMEOUT_EXPERIENCE_VALUE;\r
+//\r
+// Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]\r
+//\r
+#define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)\r
\r
+//\r
+// Sync and Async transfer polling interval, set by experience,\r
+// and the unit of Async is 100us, means 1ms as interval.\r
+//\r
+#define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)\r
+#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r
+\r
+//\r
+// EHCI debug port control status register bit definition\r
+//\r
+#define USB_DEBUG_PORT_IN_USE BIT10\r
+#define USB_DEBUG_PORT_ENABLE BIT28\r
+#define USB_DEBUG_PORT_OWNER BIT30\r
\r
//\r
// EHC raises TPL to TPL_NOTIFY to serialize all its operations\r
// to protect shared data structures.\r
//\r
-#define EHC_TPL TPL_NOTIFY\r
+#define EHC_TPL TPL_NOTIFY\r
\r
//\r
-//Iterate through the doule linked list. NOT delete safe\r
+//Iterate through the double linked list. NOT delete safe\r
//\r
#define EFI_LIST_FOR_EACH(Entry, ListHead) \\r
for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)\r
\r
//\r
-//Iterate through the doule linked list. This is delete-safe.\r
+//Iterate through the double linked list. This is delete-safe.\r
//Don't touch NextEntry\r
//\r
#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r
EFI_USB2_HC_PROTOCOL Usb2Hc;\r
\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
UINT64 OriginalPciAttributes;\r
USBHC_MEM_POOL *MemPool;\r
\r
EHC_QTD *ShortReadStop;\r
EFI_EVENT PollTimer;\r
\r
+ //\r
+ // ExitBootServicesEvent is used to stop the EHC DMA operation \r
+ // after exit boot service.\r
+ //\r
+ EFI_EVENT ExitBootServiceEvent;\r
+\r
//\r
// Asynchronous(bulk and control) transfer schedule data:\r
// ReclaimHead is used as the head of the asynchronous transfer\r
EHC_QH *ReclaimHead;\r
\r
//\r
- // Peroidic (interrupt) transfer schedule data:\r
+ // Periodic (interrupt) transfer schedule data:\r
//\r
- VOID *PeriodFrame; // Mapped as common buffer\r
- VOID *PeriodFrameHost;\r
+ VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r
+ VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r
VOID *PeriodFrameMap;\r
\r
EHC_QH *PeriodOne;\r
UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET\r
UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS\r
UINT32 CapLen; // Capability length\r
- UINT32 High32bitAddr;\r
\r
//\r
// Misc\r
//\r
EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
+\r
+ //\r
+ // EHCI debug port info\r
+ //\r
+ UINT16 DebugPortOffset; // The offset of debug port mmio register\r
+ UINT8 DebugPortBarNum; // The bar number of debug port mmio register\r
+ UINT8 DebugPortNum; // The port number of usb debug port\r
+\r
+ BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device\r
};\r
\r
\r
);\r
\r
/**\r
- Stop this driver on ControllerHandle. Support stoping any child handles\r
+ Stop this driver on ControllerHandle. Support stopping any child handles\r
created by this driver.\r
\r
@param This Protocol instance pointer.\r
projects / mirror_edk2.git / blobdiff