add error handling on usb related modules.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / EhciDxe / EhciReg.h

diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
index 00406e549b7f8a8208f082745d9686297b49fbd4..a995dc40c2e2fbb96b3af5a8d391716e0ce1f00c 100644 (file)
--- a/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
+++ b/MdeModulePkg/Bus/Pci/EhciDxe/EhciReg.h
@@ -2,7 +2,7 @@
 \r
   This file contains the definination for host controller register operation routines.\r
 \r
-Copyright (c) 2007, Intel Corporation\r
+Copyright (c) 2007 - 2009, Intel Corporation\r
 All rights reserved. This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -83,8 +83,6 @@ typedef enum {
   //\r
   // PCI Configuration Registers\r
   //\r
-  EHC_PCI_CLASSC          = 0x09,\r
-  EHC_PCI_CLASSC_PI       = 0x20,\r
   EHC_BAR_INDEX           = 0 /* how many bytes away from USB_BASE to 0x10 */\r
 }EHCI_REGISTER_OFFSET;\r
 \r
@@ -128,8 +126,7 @@ UINT32
 EhcReadCapRegister (\r
   IN  USB2_HC_DEV         *Ehc,\r
   IN  UINT32              Offset\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -145,8 +142,7 @@ UINT32
 EhcReadOpReg (\r
   IN  USB2_HC_DEV         *Ehc,\r
   IN  UINT32              Offset\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -156,17 +152,43 @@ EhcReadOpReg (
   @param  Offset   EHCI operation register offset.\r
   @param  Data     The data to write.\r
 \r
-  @return None.\r
-\r
 **/\r
 VOID\r
 EhcWriteOpReg (\r
   IN USB2_HC_DEV          *Ehc,\r
   IN UINT32               Offset,\r
   IN UINT32               Data\r
-  )\r
-;\r
+  );\r
+\r
+/**\r
+  Set one bit of the operational register while keeping other bits.\r
+\r
+  @param  Ehc          The EHCI device.\r
+  @param  Offset       The offset of the operational register.\r
+  @param  Bit          The bit mask of the register to set.\r
+\r
+**/\r
+VOID\r
+EhcSetOpRegBit (\r
+  IN USB2_HC_DEV          *Ehc,\r
+  IN UINT32               Offset,\r
+  IN UINT32               Bit\r
+  );\r
 \r
+/**\r
+  Clear one bit of the operational register while keeping other bits.\r
+\r
+  @param  Ehc          The EHCI device.\r
+  @param  Offset       The offset of the operational register.\r
+  @param  Bit          The bit mask of the register to clear.\r
+\r
+**/\r
+VOID\r
+EhcClearOpRegBit (\r
+  IN USB2_HC_DEV          *Ehc,\r
+  IN UINT32               Offset,\r
+  IN UINT32               Bit\r
+  );\r
 \r
 /**\r
   Add support for UEFI Over Legacy (UoL) feature, stop\r
@@ -174,14 +196,11 @@ EhcWriteOpReg (
 \r
   @param  Ehc      The EHCI device.\r
 \r
-  @return None.\r
-\r
 **/\r
 VOID\r
 EhcClearLegacySupport (\r
   IN USB2_HC_DEV          *Ehc\r
-  )\r
-;\r
+  );\r
 \r
 \r
 \r
@@ -200,8 +219,7 @@ EFI_STATUS
 EhcSetAndWaitDoorBell (\r
   IN  USB2_HC_DEV         *Ehc,\r
   IN  UINT32               Timeout\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -209,14 +227,11 @@ EhcSetAndWaitDoorBell (
 \r
   @param  Ehc      The EHCI device.\r
 \r
-  @return None.\r
-\r
 **/\r
 VOID\r
 EhcAckAllInterrupt (\r
   IN  USB2_HC_DEV         *Ehc\r
-  )\r
-;\r
+  );\r
 \r
 \r
 \r
@@ -232,8 +247,7 @@ EhcAckAllInterrupt (
 BOOLEAN\r
 EhcIsHalt (\r
   IN USB2_HC_DEV          *Ehc\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -248,8 +262,7 @@ EhcIsHalt (
 BOOLEAN\r
 EhcIsSysError (\r
   IN USB2_HC_DEV          *Ehc\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -266,8 +279,7 @@ EFI_STATUS
 EhcResetHC (\r
   IN USB2_HC_DEV          *Ehc,\r
   IN UINT32               Timeout\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -284,8 +296,7 @@ EFI_STATUS
 EhcHaltHC (\r
   IN USB2_HC_DEV         *Ehc,\r
   IN UINT32              Timeout\r
-  )\r
-;\r
+  );\r
 \r
 \r
 /**\r
@@ -302,8 +313,7 @@ EFI_STATUS
 EhcRunHC (\r
   IN USB2_HC_DEV          *Ehc,\r
   IN UINT32               Timeout\r
-  )\r
-;\r
+  );\r
 \r
 \r
 \r
@@ -325,7 +335,6 @@ EhcRunHC (
 EFI_STATUS\r
 EhcInitHC (\r
   IN USB2_HC_DEV          *Ehc\r
-  )\r
-;\r
+  );\r
 \r
 #endif\r