/** @file\r
\r
-Copyright (c) 2007, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
+ This file contains URB request, each request is warpped in a\r
+ URB (Usb Request Block).\r
+\r
+Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
-Module Name:\r
-\r
- EhciUrb.h\r
-\r
-Abstract:\r
-\r
- This file contains URB request, each request is warpped in a\r
- URB (Usb Request Block)\r
-\r
-Revision History\r
-\r
**/\r
\r
#ifndef _EFI_EHCI_URB_H_\r
typedef struct _EHC_QH EHC_QH;\r
typedef struct _URB URB;\r
\r
-enum {\r
- //\r
- // Transfer types, used in URB to identify the transfer type\r
- //\r
- EHC_CTRL_TRANSFER = 0x01,\r
- EHC_BULK_TRANSFER = 0x02,\r
- EHC_INT_TRANSFER_SYNC = 0x04,\r
- EHC_INT_TRANSFER_ASYNC = 0x08,\r
+//\r
+// Transfer types, used in URB to identify the transfer type\r
+//\r
+#define EHC_CTRL_TRANSFER 0x01\r
+#define EHC_BULK_TRANSFER 0x02\r
+#define EHC_INT_TRANSFER_SYNC 0x04\r
+#define EHC_INT_TRANSFER_ASYNC 0x08\r
\r
- EHC_QTD_SIG = EFI_SIGNATURE_32 ('U', 'S', 'B', 'T'),\r
- EHC_QH_SIG = EFI_SIGNATURE_32 ('U', 'S', 'B', 'H'),\r
- EHC_URB_SIG = EFI_SIGNATURE_32 ('U', 'S', 'B', 'R'),\r
+#define EHC_QTD_SIG SIGNATURE_32 ('U', 'S', 'B', 'T')\r
+#define EHC_QH_SIG SIGNATURE_32 ('U', 'S', 'B', 'H')\r
+#define EHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')\r
\r
- //\r
- // Hardware related bit definitions\r
- //\r
- EHC_TYPE_ITD = 0x00,\r
- EHC_TYPE_QH = 0x02,\r
- EHC_TYPE_SITD = 0x04,\r
- EHC_TYPE_FSTN = 0x06,\r
-\r
- QH_NAK_RELOAD = 3,\r
- QH_HSHBW_MULTI = 1,\r
-\r
- QTD_MAX_ERR = 3,\r
- QTD_PID_OUTPUT = 0x00,\r
- QTD_PID_INPUT = 0x01,\r
- QTD_PID_SETUP = 0x02,\r
-\r
- QTD_STAT_DO_OUT = 0,\r
- QTD_STAT_DO_SS = 0,\r
- QTD_STAT_DO_PING = 0x01,\r
- QTD_STAT_DO_CS = 0x02,\r
- QTD_STAT_TRANS_ERR = 0x08,\r
- QTD_STAT_BABBLE_ERR = 0x10,\r
- QTD_STAT_BUFF_ERR = 0x20,\r
- QTD_STAT_HALTED = 0x40,\r
- QTD_STAT_ACTIVE = 0x80,\r
- QTD_STAT_ERR_MASK = QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR,\r
-\r
- QTD_MAX_BUFFER = 4,\r
- QTD_BUF_LEN = 4096,\r
- QTD_BUF_MASK = 0x0FFF,\r
-\r
- QH_MICROFRAME_0 = 0x01,\r
- QH_MICROFRAME_1 = 0x02,\r
- QH_MICROFRAME_2 = 0x04,\r
- QH_MICROFRAME_3 = 0x08,\r
- QH_MICROFRAME_4 = 0x10,\r
- QH_MICROFRAME_5 = 0x20,\r
- QH_MICROFRAME_6 = 0x40,\r
- QH_MICROFRAME_7 = 0x80,\r
-\r
- USB_ERR_SHORT_PACKET = 0x200\r
-};\r
+//\r
+// Hardware related bit definitions\r
+//\r
+#define EHC_TYPE_ITD 0x00\r
+#define EHC_TYPE_QH 0x02\r
+#define EHC_TYPE_SITD 0x04\r
+#define EHC_TYPE_FSTN 0x06\r
+\r
+#define QH_NAK_RELOAD 3\r
+#define QH_HSHBW_MULTI 1\r
+\r
+#define QTD_MAX_ERR 3\r
+#define QTD_PID_OUTPUT 0x00\r
+#define QTD_PID_INPUT 0x01\r
+#define QTD_PID_SETUP 0x02\r
+\r
+#define QTD_STAT_DO_OUT 0\r
+#define QTD_STAT_DO_SS 0\r
+#define QTD_STAT_DO_PING 0x01\r
+#define QTD_STAT_DO_CS 0x02\r
+#define QTD_STAT_TRANS_ERR 0x08\r
+#define QTD_STAT_BABBLE_ERR 0x10\r
+#define QTD_STAT_BUFF_ERR 0x20\r
+#define QTD_STAT_HALTED 0x40\r
+#define QTD_STAT_ACTIVE 0x80\r
+#define QTD_STAT_ERR_MASK (QTD_STAT_TRANS_ERR | QTD_STAT_BABBLE_ERR | QTD_STAT_BUFF_ERR)\r
+\r
+#define QTD_MAX_BUFFER 4\r
+#define QTD_BUF_LEN 4096\r
+#define QTD_BUF_MASK 0x0FFF\r
+\r
+#define QH_MICROFRAME_0 0x01\r
+#define QH_MICROFRAME_1 0x02\r
+#define QH_MICROFRAME_2 0x04\r
+#define QH_MICROFRAME_3 0x08\r
+#define QH_MICROFRAME_4 0x10\r
+#define QH_MICROFRAME_5 0x20\r
+#define QH_MICROFRAME_6 0x40\r
+#define QH_MICROFRAME_7 0x80\r
+\r
+#define USB_ERR_SHORT_PACKET 0x200\r
\r
//\r
// Fill in the hardware link point: pass in a EHC_QH/QH_HW\r
UINT32 Pid : 2;\r
UINT32 ErrCnt : 2;\r
UINT32 CurPage : 3;\r
- UINT32 IOC : 1;\r
+ UINT32 Ioc : 1;\r
UINT32 TotalBytes : 15;\r
UINT32 DataToggle : 1;\r
\r
UINT32 Pid : 2;\r
UINT32 ErrCnt : 2;\r
UINT32 CurPage : 3;\r
- UINT32 IOC : 1;\r
+ UINT32 Ioc : 1;\r
UINT32 TotalBytes : 15;\r
UINT32 DataToggle : 1;\r
\r
\r
\r
/**\r
- Create a single QTD to hold the data\r
+ Create a single QTD to hold the data.\r
\r
- @param Ehc The EHCI device\r
- @param Data Current data not associated with a QTD\r
- @param DataLen The length of the data\r
- @param PktId Packet ID to use in the QTD\r
- @param Toggle Data toggle to use in the QTD\r
- @param MaxPacket Maximu packet length of the endpoint\r
+ @param Ehc The EHCI device.\r
+ @param Data The cpu memory address of current data not associated with a QTD.\r
+ @param DataPhy The pci bus address of current data not associated with a QTD.\r
+ @param DataLen The length of the data.\r
+ @param PktId Packet ID to use in the QTD.\r
+ @param Toggle Data toggle to use in the QTD.\r
+ @param MaxPacket Maximu packet length of the endpoint.\r
\r
- @return Created QTD or NULL if failed to create one\r
+ @return Created QTD or NULL if failed to create one.\r
\r
**/\r
EHC_QTD *\r
EhcCreateQtd (\r
IN USB2_HC_DEV *Ehc,\r
IN UINT8 *Data,\r
+ IN UINT8 *DataPhy,\r
IN UINTN DataLen,\r
IN UINT8 PktId,\r
IN UINT8 Toggle,\r
IN UINTN MaxPacket\r
- )\r
-;\r
+ );\r
\r
\r
\r
/**\r
- Allocate and initialize a EHCI queue head\r
+ Allocate and initialize a EHCI queue head.\r
\r
- @param Ehci The EHCI device\r
- @param Ep The endpoint to create queue head for\r
+ @param Ehci The EHCI device.\r
+ @param Ep The endpoint to create queue head for.\r
\r
- @return Created queue head or NULL if failed to create one\r
+ @return Created queue head or NULL if failed to create one.\r
\r
**/\r
EHC_QH *\r
EhcCreateQh (\r
IN USB2_HC_DEV *Ehci,\r
IN USB_ENDPOINT *Ep\r
- )\r
-;\r
+ );\r
\r
\r
/**\r
Free an allocated URB. It is possible for it to be partially inited.\r
\r
- @param Ehc The EHCI device\r
- @param Urb The URB to free\r
-\r
- @return None\r
+ @param Ehc The EHCI device.\r
+ @param Urb The URB to free.\r
\r
**/\r
VOID\r
EhcFreeUrb (\r
IN USB2_HC_DEV *Ehc,\r
IN URB *Urb\r
- )\r
-;\r
+ );\r
\r
\r
/**\r
- Create a new URB and its associated QTD\r
-\r
- @param Ehc The EHCI device\r
- @param DevAddr The device address\r
- @param EpAddr Endpoint addrress & its direction\r
- @param DevSpeed The device speed\r
- @param Toggle Initial data toggle to use\r
- @param MaxPacket The max packet length of the endpoint\r
- @param Hub The transaction translator to use\r
- @param Type The transaction type\r
- @param Request The standard USB request for control transfer\r
- @param Data The user data to transfer\r
- @param DataLen The length of data buffer\r
- @param Callback The function to call when data is transferred\r
- @param Context The context to the callback\r
- @param Interval The interval for interrupt transfer\r
-\r
- @return Created URB or NULL\r
+ Create a new URB and its associated QTD.\r
+\r
+ @param Ehc The EHCI device.\r
+ @param DevAddr The device address.\r
+ @param EpAddr Endpoint addrress & its direction.\r
+ @param DevSpeed The device speed.\r
+ @param Toggle Initial data toggle to use.\r
+ @param MaxPacket The max packet length of the endpoint.\r
+ @param Hub The transaction translator to use.\r
+ @param Type The transaction type.\r
+ @param Request The standard USB request for control transfer.\r
+ @param Data The user data to transfer.\r
+ @param DataLen The length of data buffer.\r
+ @param Callback The function to call when data is transferred.\r
+ @param Context The context to the callback.\r
+ @param Interval The interval for interrupt transfer.\r
+\r
+ @return Created URB or NULL.\r
\r
**/\r
URB *\r
IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,\r
IN VOID *Context,\r
IN UINTN Interval\r
- )\r
-;\r
+ );\r
#endif\r
projects / mirror_edk2.git / blobdiff