PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid\r
which is used to enable recovery function from USB Drivers.\r
\r
-Copyright (c) 2010 - 2013, Intel Corporation. All rights reserved.<BR>\r
- \r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions\r
-of the BSD License which accompanies this distribution. The\r
-full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
+Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
/**\r
Create helper QTD/QH for the EHCI device.\r
- \r
+\r
@param Ehc The EHCI device.\r
\r
@retval EFI_OUT_OF_RESOURCES Failed to allocate resource for helper QTD/QH.\r
\r
/**\r
Initialize the schedule data structure such as frame list.\r
- \r
+\r
@param Ehc The EHCI device to init schedule data for.\r
\r
@retval EFI_OUT_OF_RESOURCES Failed to allocate resource to init schedule data.\r
IN PEI_USB2_HC_DEV *Ehc\r
)\r
{\r
+ VOID *Buf;\r
EFI_PHYSICAL_ADDRESS PhyAddr;\r
VOID *Map;\r
UINTN Index;\r
UINT32 *Desc;\r
EFI_STATUS Status;\r
+ EFI_PHYSICAL_ADDRESS PciAddr;\r
\r
//\r
// First initialize the periodical schedule data:\r
// The Frame List ocupies 4K bytes,\r
// and must be aligned on 4-Kbyte boundaries.\r
//\r
- Status = PeiServicesAllocatePages (\r
- EfiBootServicesCode,\r
+ Status = IoMmuAllocateBuffer (\r
+ Ehc->IoMmu,\r
1,\r
- &PhyAddr\r
+ &Buf,\r
+ &PhyAddr,\r
+ &Map\r
);\r
\r
- Map = NULL;\r
- Ehc->PeriodFrameHost = (VOID *)(UINTN)PhyAddr;\r
- Ehc->PeriodFrame = (VOID *)(UINTN)PhyAddr;\r
+ if (EFI_ERROR (Status) || (Buf == NULL)) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+\r
+ Ehc->PeriodFrame = Buf;\r
Ehc->PeriodFrameMap = Map;\r
Ehc->High32bitAddr = EHC_HIGH_32BIT (PhyAddr);\r
\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
//\r
// Initialize the frame list entries then set the registers\r
//\r
Desc = (UINT32 *) Ehc->PeriodFrame;\r
-\r
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));\r
for (Index = 0; Index < EHC_FRAME_LEN; Index++) {\r
- Desc[Index] = QH_LINK (Ehc->PeriodOne, EHC_TYPE_QH, FALSE);\r
+ Desc[Index] = QH_LINK (PciAddr, EHC_TYPE_QH, FALSE);\r
}\r
\r
- EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (Ehc->PeriodFrame));\r
+ EhcWriteOpReg (Ehc, EHC_FRAME_BASE_OFFSET, EHC_LOW_32BIT (PhyAddr));\r
\r
//\r
// Second initialize the asynchronous schedule:\r
// Only need to set the AsynListAddr register to\r
// the reclamation header\r
//\r
- EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (Ehc->ReclaimHead));\r
+ PciAddr = UsbHcGetPciAddressForHostMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));\r
+ EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, EHC_LOW_32BIT (PciAddr));\r
return EFI_SUCCESS;\r
}\r
\r
/**\r
Free the schedule data. It may be partially initialized.\r
- \r
- @param Ehc The EHCI device. \r
+\r
+ @param Ehc The EHCI device.\r
\r
**/\r
VOID\r
EhcWriteOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET, 0);\r
\r
if (Ehc->PeriodOne != NULL) {\r
- UsbHcFreeMem (Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));\r
+ UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->PeriodOne, sizeof (PEI_EHC_QH));\r
Ehc->PeriodOne = NULL;\r
}\r
\r
if (Ehc->ReclaimHead != NULL) {\r
- UsbHcFreeMem (Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));\r
+ UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->ReclaimHead, sizeof (PEI_EHC_QH));\r
Ehc->ReclaimHead = NULL;\r
}\r
\r
if (Ehc->ShortReadStop != NULL) {\r
- UsbHcFreeMem (Ehc->MemPool, Ehc->ShortReadStop, sizeof (PEI_EHC_QTD));\r
+ UsbHcFreeMem (Ehc, Ehc->MemPool, Ehc->ShortReadStop, sizeof (PEI_EHC_QTD));\r
Ehc->ShortReadStop = NULL;\r
}\r
\r
if (Ehc->MemPool != NULL) {\r
- UsbHcFreeMemPool (Ehc->MemPool);\r
+ UsbHcFreeMemPool (Ehc, Ehc->MemPool);\r
Ehc->MemPool = NULL;\r
}\r
\r
if (Ehc->PeriodFrame != NULL) {\r
+ IoMmuFreeBuffer (Ehc->IoMmu, 1, Ehc->PeriodFrame, Ehc->PeriodFrameMap);\r
Ehc->PeriodFrame = NULL;\r
}\r
}\r
due to its interfaces. This simplifies the AsynList\r
management: A reclamation header is always linked to\r
the AsyncListAddr, the only active QH is appended to it.\r
- \r
+\r
@param Ehc The EHCI device.\r
@param Qh The queue head to link.\r
\r
/**\r
Unlink a queue head from the asynchronous schedule list.\r
Need to synchronize with hardware.\r
- \r
+\r
@param Ehc The EHCI device.\r
@param Qh The queue head to unlink.\r
\r
// Set and wait the door bell to synchronize with the hardware\r
//\r
EhcSetAndWaitDoorBell (Ehc, EHC_GENERIC_TIMEOUT);\r
- \r
+\r
return;\r
}\r
\r
/**\r
Check the URB's execution result and update the URB's\r
- result accordingly. \r
+ result accordingly.\r
\r
@param Ehc The EHCI device.\r
@param Urb The URB to check result.\r
\r
Finished = TRUE;\r
goto ON_EXIT;\r
- \r
+\r
} else if (EHC_BIT_IS_SET (State, QTD_STAT_ACTIVE)) {\r
//\r
// The QTD is still active, no need to check furthur.\r
//\r
Urb->Result |= EFI_USB_ERR_NOTEXECUTE;\r
- \r
+\r
Finished = FALSE;\r
goto ON_EXIT;\r
\r
// Status Stage of the setup transfer to get the finial result\r
//\r
if (QtdHw->AltNext == QTD_LINK (Ehc->ShortReadStop, FALSE)) {\r
- \r
+\r
Finished = TRUE;\r
goto ON_EXIT;\r
}\r
\r
/**\r
Execute the transfer by polling the URB. This is a synchronous operation.\r
- \r
+\r
@param Ehc The EHCI device.\r
@param Urb The URB to execute.\r
@param TimeOut The time to wait before abort, in millisecond.\r
projects / mirror_edk2.git / blobdiff