/** @file\r
Private Header file for Usb Host Controller PEIM\r
\r
-Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
- \r
+Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
+\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
of the BSD License which accompanies this distribution. The\r
#define USB_ERR_SHORT_PACKET 0x200\r
\r
//\r
-// Fill in the hardware link point: pass in a EHC_QH/QH_HW \r
+// Fill in the hardware link point: pass in a EHC_QH/QH_HW\r
// pointer to QH_LINK; A EHC_QTD/QTD_HW pointer to QTD_LINK\r
//\r
#define QH_LINK(Addr, Type, Term) \\r
#define QTD_LINK(Addr, Term) QH_LINK((Addr), 0, (Term))\r
\r
//\r
-// The defination of EHCI hardware used data structure for \r
-// little endian architecture. The QTD and QH structures \r
-// are required to be 32 bytes aligned. Don't add members \r
+// The defination of EHCI hardware used data structure for\r
+// little endian architecture. The QTD and QH structures\r
+// are required to be 32 bytes aligned. Don't add members\r
// to the head of the associated software strucuture.\r
//\r
#pragma pack(1)\r
typedef struct {\r
UINT32 NextQtd;\r
UINT32 AltNext;\r
- \r
+\r
UINT32 Status : 8;\r
UINT32 Pid : 2;\r
UINT32 ErrCnt : 2;\r
} QTD_HW;\r
\r
typedef struct {\r
- UINT32 HorizonLink; \r
+ UINT32 HorizonLink;\r
//\r
// Endpoint capabilities/Characteristics DWord 1 and DWord 2\r
//\r
UINT32 CurQtd;\r
UINT32 NextQtd;\r
UINT32 AltQtd;\r
- \r
+\r
UINT32 Status : 8;\r
UINT32 Pid : 2;\r
UINT32 ErrCnt : 2;\r
} USB_ENDPOINT;\r
\r
//\r
-// Software QTD strcture, this is used to manage all the \r
+// Software QTD strcture, this is used to manage all the\r
// QTD generated from a URB. Don't add fields before QtdHw.\r
//\r
struct _PEI_EHC_QTD {\r
\r
\r
//\r
-// Software QH structure. All three different transaction types \r
-// supported by UEFI USB, that is the control/bulk/interrupt \r
-// transfers use the queue head and queue token strcuture. \r
+// Software QH structure. All three different transaction types\r
+// supported by UEFI USB, that is the control/bulk/interrupt\r
+// transfers use the queue head and queue token strcuture.\r
//\r
// Interrupt QHs are linked to periodic frame list in the reversed\r
-// 2^N tree. Each interrupt QH is linked to the list starting at \r
+// 2^N tree. Each interrupt QH is linked to the list starting at\r
// frame 0. There is a dummy interrupt QH linked to each frame as\r
// a sentinental whose polling interval is 1. Synchronous interrupt\r
-// transfer is linked after this dummy QH. \r
-// \r
-// For control/bulk transfer, only synchronous (in the sense of UEFI) \r
+// transfer is linked after this dummy QH.\r
+//\r
+// For control/bulk transfer, only synchronous (in the sense of UEFI)\r
// transfer is supported. A dummy QH is linked to EHCI AsyncListAddr\r
// as the reclamation header. New transfer is inserted after this QH.\r
//\r
UINT32 Signature;\r
PEI_EHC_QH *NextQh; // The queue head pointed to by horizontal link\r
EFI_LIST_ENTRY Qtds; // The list of QTDs to this queue head\r
- UINTN Interval; \r
+ UINTN Interval;\r
};\r
\r
//\r
-// URB (Usb Request Block) contains information for all kinds of \r
+// URB (Usb Request Block) contains information for all kinds of\r
// usb requests.\r
//\r
struct _PEI_URB {\r
UINT32 Signature;\r
EFI_LIST_ENTRY UrbList;\r
- \r
+\r
//\r
// Transaction information\r
//\r
UINTN DataLen;\r
VOID *DataPhy; // Address of the mapped user data\r
VOID *DataMap;\r
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback; \r
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;\r
VOID *Context;\r
\r
//\r
// Schedule data\r
//\r
PEI_EHC_QH *Qh;\r
- \r
+\r
//\r
// Transaction result\r
//\r
/**\r
Delete a single asynchronous interrupt transfer for\r
the device and endpoint.\r
- \r
+\r
@param Ehc The EHCI device.\r
@param Data Current data not associated with a QTD.\r
@param DataLen The length of the data.\r
\r
/**\r
Allocate and initialize a EHCI queue head.\r
- \r
+\r
@param Ehci The EHCI device.\r
@param Ep The endpoint to create queue head for.\r
\r
\r
/**\r
Free an allocated URB. It is possible for it to be partially inited.\r
- \r
+\r
@param Ehc The EHCI device.\r
@param Urb The URB to free.\r
\r
\r
/**\r
Create a new URB and its associated QTD.\r
- \r
+\r
@param Ehc The EHCI device.\r
@param DevAddr The device address.\r
@param EpAddr Endpoint addrress & its direction.\r
EhcCreateUrb (\r
IN PEI_USB2_HC_DEV *Ehc,\r
IN UINT8 DevAddr,\r
- IN UINT8 EpAddr, \r
+ IN UINT8 EpAddr,\r
IN UINT8 DevSpeed,\r
IN UINT8 Toggle,\r
IN UINTN MaxPacket,\r
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