NvmExpressDxe driver is used to manage non-volatile memory subsystem which follows\r
NVM Express specification.\r
\r
- Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
+ Copyright (c) 2013 - 2019, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Uefi.h>\r
\r
#include <IndustryStandard/Pci.h>\r
+#include <IndustryStandard/Nvme.h>\r
\r
#include <Protocol/ComponentName.h>\r
#include <Protocol/ComponentName2.h>\r
#include <Protocol/LoadedImage.h>\r
#include <Protocol/DevicePath.h>\r
#include <Protocol/PciIo.h>\r
+#include <Protocol/NvmExpressPassthru.h>\r
#include <Protocol/BlockIo.h>\r
+#include <Protocol/BlockIo2.h>\r
#include <Protocol/DiskInfo.h>\r
#include <Protocol/DriverSupportedEfiVersion.h>\r
+#include <Protocol/StorageSecurityCommand.h>\r
+#include <Protocol/ResetNotification.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Library/UefiDriverEntryPoint.h>\r
+#include <Library/ReportStatusCodeLib.h>\r
\r
typedef struct _NVME_CONTROLLER_PRIVATE_DATA NVME_CONTROLLER_PRIVATE_DATA;\r
typedef struct _NVME_DEVICE_PRIVATE_DATA NVME_DEVICE_PRIVATE_DATA;\r
\r
-#include "NvmExpressPassthru.h"\r
#include "NvmExpressBlockIo.h"\r
#include "NvmExpressDiskInfo.h"\r
#include "NvmExpressHci.h"\r
#define NVME_CSQ_SIZE 1 // Number of I/O submission queue entries, which is 0-based\r
#define NVME_CCQ_SIZE 1 // Number of I/O completion queue entries, which is 0-based\r
\r
-#define NVME_MAX_IO_QUEUES 2 // Number of I/O queues supported by the driver\r
+//\r
+// Number of asynchronous I/O submission queue entries, which is 0-based.\r
+// The asynchronous I/O submission queue size is 4kB in total.\r
+//\r
+#define NVME_ASYNC_CSQ_SIZE 63\r
+//\r
+// Number of asynchronous I/O completion queue entries, which is 0-based.\r
+// The asynchronous I/O completion queue size is 4kB in total.\r
+//\r
+#define NVME_ASYNC_CCQ_SIZE 255\r
+\r
+#define NVME_MAX_QUEUES 3 // Number of queues supported by the driver\r
\r
#define NVME_CONTROLLER_ID 0\r
\r
//\r
#define NVME_GENERIC_TIMEOUT EFI_TIMER_PERIOD_SECONDS (5)\r
\r
+//\r
+// Nvme async transfer timer interval, set by experience.\r
+//\r
+#define NVME_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS (1)\r
+\r
//\r
// Unique signature for private data structure.\r
//\r
// Nvme private data structure.\r
//\r
struct _NVME_CONTROLLER_PRIVATE_DATA {\r
- UINT32 Signature;\r
+ UINT32 Signature;\r
\r
- EFI_HANDLE ControllerHandle;\r
- EFI_HANDLE ImageHandle;\r
- EFI_HANDLE DriverBindingHandle;\r
+ EFI_HANDLE ControllerHandle;\r
+ EFI_HANDLE ImageHandle;\r
+ EFI_HANDLE DriverBindingHandle;\r
\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- UINT64 PciAttributes;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT64 PciAttributes;\r
\r
- EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r
\r
- NVM_EXPRESS_PASS_THRU_MODE PassThruMode;\r
- NVM_EXPRESS_PASS_THRU_PROTOCOL Passthru;\r
+ EFI_NVM_EXPRESS_PASS_THRU_MODE PassThruMode;\r
+ EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL Passthru;\r
\r
//\r
// pointer to identify controller data\r
//\r
- NVME_ADMIN_CONTROLLER_DATA *ControllerData;\r
+ NVME_ADMIN_CONTROLLER_DATA *ControllerData;\r
\r
//\r
// 6 x 4kB aligned buffers will be carved out of this buffer.\r
// 1st 4kB boundary is the start of the admin submission queue.\r
- // 2nd 4kB boundary is the start of submission queue #1.\r
- // 3rd 4kB boundary is the start of the admin completion queue.\r
- // 4th 4kB boundary is the start of completion queue #1.\r
- // 5th 4kB boundary is the start of the first PRP list page.\r
- // 6th 4kB boundary is the start of the second PRP list page.\r
+ // 2nd 4kB boundary is the start of the admin completion queue.\r
+ // 3rd 4kB boundary is the start of I/O submission queue #1.\r
+ // 4th 4kB boundary is the start of I/O completion queue #1.\r
+ // 5th 4kB boundary is the start of I/O submission queue #2.\r
+ // 6th 4kB boundary is the start of I/O completion queue #2.\r
//\r
- UINT8 *Buffer;\r
- UINT8 *BufferPciAddr;\r
+ UINT8 *Buffer;\r
+ UINT8 *BufferPciAddr;\r
\r
//\r
// Pointers to 4kB aligned submission & completion queues.\r
//\r
- NVME_SQ *SqBuffer[NVME_MAX_IO_QUEUES];\r
- NVME_CQ *CqBuffer[NVME_MAX_IO_QUEUES];\r
- NVME_SQ *SqBufferPciAddr[NVME_MAX_IO_QUEUES];\r
- NVME_CQ *CqBufferPciAddr[NVME_MAX_IO_QUEUES];\r
+ NVME_SQ *SqBuffer[NVME_MAX_QUEUES];\r
+ NVME_CQ *CqBuffer[NVME_MAX_QUEUES];\r
+ NVME_SQ *SqBufferPciAddr[NVME_MAX_QUEUES];\r
+ NVME_CQ *CqBufferPciAddr[NVME_MAX_QUEUES];\r
\r
//\r
// Submission and completion queue indices.\r
//\r
- NVME_SQTDBL SqTdbl[NVME_MAX_IO_QUEUES];\r
- NVME_CQHDBL CqHdbl[NVME_MAX_IO_QUEUES];\r
+ NVME_SQTDBL SqTdbl[NVME_MAX_QUEUES];\r
+ NVME_CQHDBL CqHdbl[NVME_MAX_QUEUES];\r
+ UINT16 AsyncSqHead;\r
+\r
+ //\r
+ // Flag to indicate internal IO queue creation.\r
+ //\r
+ BOOLEAN CreateIoQueue;\r
\r
- UINT8 Pt[2];\r
- UINT16 Cid[2];\r
+ UINT8 Pt[NVME_MAX_QUEUES];\r
+ UINT16 Cid[NVME_MAX_QUEUES];\r
\r
//\r
// Nvme controller capabilities\r
//\r
- NVME_CAP Cap;\r
+ NVME_CAP Cap;\r
\r
- VOID *Mapping;\r
+ VOID *Mapping;\r
+\r
+ //\r
+ // For Non-blocking operations.\r
+ //\r
+ EFI_EVENT TimerEvent;\r
+ LIST_ENTRY AsyncPassThruQueue;\r
+ LIST_ENTRY UnsubmittedSubtasks;\r
};\r
\r
#define NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU(a) \\r
// Nvme device private data structure\r
//\r
struct _NVME_DEVICE_PRIVATE_DATA {\r
- UINT32 Signature;\r
+ UINT32 Signature;\r
+\r
+ EFI_HANDLE DeviceHandle;\r
+ EFI_HANDLE ControllerHandle;\r
+ EFI_HANDLE DriverBindingHandle;\r
\r
- EFI_HANDLE DeviceHandle;\r
- EFI_HANDLE ControllerHandle;\r
- EFI_HANDLE DriverBindingHandle;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
\r
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
+ UINT32 NamespaceId;\r
+ UINT64 NamespaceUuid;\r
\r
- UINT32 NamespaceId;\r
- UINT64 NamespaceUuid;\r
+ EFI_BLOCK_IO_MEDIA Media;\r
+ EFI_BLOCK_IO_PROTOCOL BlockIo;\r
+ EFI_BLOCK_IO2_PROTOCOL BlockIo2;\r
+ EFI_DISK_INFO_PROTOCOL DiskInfo;\r
+ EFI_STORAGE_SECURITY_COMMAND_PROTOCOL StorageSecurity;\r
\r
- EFI_BLOCK_IO_MEDIA Media;\r
- EFI_BLOCK_IO_PROTOCOL BlockIo;\r
- EFI_DISK_INFO_PROTOCOL DiskInfo;\r
+ LIST_ENTRY AsyncQueue;\r
\r
- EFI_LBA NumBlocks;\r
+ EFI_LBA NumBlocks;\r
\r
- CHAR16 ModelName[80];\r
- NVME_ADMIN_NAMESPACE_DATA NamespaceData;\r
+ CHAR16 ModelName[80];\r
+ NVME_ADMIN_NAMESPACE_DATA NamespaceData;\r
\r
- NVME_CONTROLLER_PRIVATE_DATA *Controller;\r
+ NVME_CONTROLLER_PRIVATE_DATA *Controller;\r
\r
};\r
\r
NVME_DEVICE_PRIVATE_DATA_SIGNATURE \\r
)\r
\r
+#define NVME_DEVICE_PRIVATE_DATA_FROM_BLOCK_IO2(a) \\r
+ CR (a, \\r
+ NVME_DEVICE_PRIVATE_DATA, \\r
+ BlockIo2, \\r
+ NVME_DEVICE_PRIVATE_DATA_SIGNATURE \\r
+ )\r
+\r
#define NVME_DEVICE_PRIVATE_DATA_FROM_DISK_INFO(a) \\r
CR (a, \\r
NVME_DEVICE_PRIVATE_DATA, \\r
NVME_DEVICE_PRIVATE_DATA_SIGNATURE \\r
)\r
\r
+#define NVME_DEVICE_PRIVATE_DATA_FROM_STORAGE_SECURITY(a)\\r
+ CR (a, \\r
+ NVME_DEVICE_PRIVATE_DATA, \\r
+ StorageSecurity, \\r
+ NVME_DEVICE_PRIVATE_DATA_SIGNATURE \\r
+ )\r
+\r
+//\r
+// Nvme block I/O 2 request.\r
+//\r
+#define NVME_BLKIO2_REQUEST_SIGNATURE SIGNATURE_32 ('N', 'B', '2', 'R')\r
+\r
+typedef struct {\r
+ UINT32 Signature;\r
+ LIST_ENTRY Link;\r
+\r
+ EFI_BLOCK_IO2_TOKEN *Token;\r
+ UINTN UnsubmittedSubtaskNum;\r
+ BOOLEAN LastSubtaskSubmitted;\r
+ //\r
+ // The queue for Nvme read/write sub-tasks of a BlockIo2 request.\r
+ //\r
+ LIST_ENTRY SubtasksQueue;\r
+} NVME_BLKIO2_REQUEST;\r
+\r
+#define NVME_BLKIO2_REQUEST_FROM_LINK(a) \\r
+ CR (a, NVME_BLKIO2_REQUEST, Link, NVME_BLKIO2_REQUEST_SIGNATURE)\r
+\r
+#define NVME_BLKIO2_SUBTASK_SIGNATURE SIGNATURE_32 ('N', 'B', '2', 'S')\r
+\r
+typedef struct {\r
+ UINT32 Signature;\r
+ LIST_ENTRY Link;\r
+\r
+ BOOLEAN IsLast;\r
+ UINT32 NamespaceId;\r
+ EFI_EVENT Event;\r
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *CommandPacket;\r
+ //\r
+ // The BlockIo2 request this subtask belongs to\r
+ //\r
+ NVME_BLKIO2_REQUEST *BlockIo2Request;\r
+} NVME_BLKIO2_SUBTASK;\r
+\r
+#define NVME_BLKIO2_SUBTASK_FROM_LINK(a) \\r
+ CR (a, NVME_BLKIO2_SUBTASK, Link, NVME_BLKIO2_SUBTASK_SIGNATURE)\r
+\r
+//\r
+// Nvme asynchronous passthru request.\r
+//\r
+#define NVME_PASS_THRU_ASYNC_REQ_SIG SIGNATURE_32 ('N', 'P', 'A', 'R')\r
+\r
+typedef struct {\r
+ UINT32 Signature;\r
+ LIST_ENTRY Link;\r
+\r
+ EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet;\r
+ UINT16 CommandId;\r
+ VOID *MapPrpList;\r
+ UINTN PrpListNo;\r
+ VOID *PrpListHost;\r
+ VOID *MapData;\r
+ VOID *MapMeta;\r
+ EFI_EVENT CallerEvent;\r
+} NVME_PASS_THRU_ASYNC_REQ;\r
+\r
+#define NVME_PASS_THRU_ASYNC_REQ_FROM_THIS(a) \\r
+ CR (a, \\r
+ NVME_PASS_THRU_ASYNC_REQ, \\r
+ Link, \\r
+ NVME_PASS_THRU_ASYNC_REQ_SIG \\r
+ )\r
+\r
/**\r
Retrieves a Unicode string that is the user readable name of the driver.\r
\r
both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the nonblocking\r
I/O functionality is optional.\r
\r
- @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
+ @param[in] This A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
@param[in] NamespaceId Is a 32 bit Namespace ID to which the Express HCI command packet will be sent.\r
A value of 0 denotes the NVM Express controller, a value of all 0FFh in the namespace\r
ID specifies that the command packet should be sent to all valid namespaces.\r
- @param[in] NamespaceUuid Is a 64 bit Namespace UUID to which the Express HCI command packet will be sent.\r
- A value of 0 denotes the NVM Express controller, a value of all 0FFh in the namespace\r
- UUID specifies that the command packet should be sent to all valid namespaces.\r
@param[in,out] Packet A pointer to the NVM Express HCI Command Packet to send to the NVMe namespace specified\r
by NamespaceId.\r
@param[in] Event If nonblocking I/O is not supported then Event is ignored, and blocking I/O is performed.\r
@retval EFI_NOT_READY The NVM Express Command Packet could not be sent because the controller is not ready. The caller\r
may retry again later.\r
@retval EFI_DEVICE_ERROR A device error occurred while attempting to send the NVM Express Command Packet.\r
- @retval EFI_INVALID_PARAMETER Namespace, or the contents of NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM\r
+ @retval EFI_INVALID_PARAMETER Namespace, or the contents of EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM\r
Express Command Packet was not sent, so no additional status information is available.\r
@retval EFI_UNSUPPORTED The command described by the NVM Express Command Packet is not supported by the host adapter.\r
The NVM Express Command Packet was not sent, so no additional status information is available.\r
EFI_STATUS\r
EFIAPI\r
NvmExpressPassThru (\r
- IN NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
IN UINT32 NamespaceId,\r
- IN UINT64 NamespaceUuid,\r
- IN OUT NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet,\r
+ IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET *Packet,\r
IN EFI_EVENT Event OPTIONAL\r
);\r
\r
/**\r
- Used to retrieve the list of namespaces defined on an NVM Express controller.\r
+ Used to retrieve the next namespace ID for this NVM Express controller.\r
+\r
+ The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() function retrieves the next valid\r
+ namespace ID on this NVM Express controller.\r
\r
- The NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() function retrieves a list of namespaces\r
- defined on an NVM Express controller. If on input a NamespaceID is specified by all 0xFF in the\r
- namespace buffer, then the first namespace defined on the NVM Express controller is returned in\r
- NamespaceID, and a status of EFI_SUCCESS is returned.\r
+ If on input the value pointed to by NamespaceId is 0xFFFFFFFF, then the first valid namespace\r
+ ID defined on the NVM Express controller is returned in the location pointed to by NamespaceId\r
+ and a status of EFI_SUCCESS is returned.\r
\r
- If NamespaceId is a Namespace value that was returned on a previous call to GetNextNamespace(),\r
- then the next valid NamespaceId for an NVM Express SSD namespace on the NVM Express controller\r
- is returned in NamespaceId, and EFI_SUCCESS is returned.\r
+ If on input the value pointed to by NamespaceId is an invalid namespace ID other than 0xFFFFFFFF,\r
+ then EFI_INVALID_PARAMETER is returned.\r
\r
- If Namespace array is not a 0xFFFFFFFF and NamespaceId was not returned on a previous call to\r
- GetNextNamespace(), then EFI_INVALID_PARAMETER is returned.\r
+ If on input the value pointed to by NamespaceId is a valid namespace ID, then the next valid\r
+ namespace ID on the NVM Express controller is returned in the location pointed to by NamespaceId,\r
+ and EFI_SUCCESS is returned.\r
\r
- If NamespaceId is the NamespaceId of the last SSD namespace on the NVM Express controller, then\r
- EFI_NOT_FOUND is returned\r
+ If the value pointed to by NamespaceId is the namespace ID of the last namespace on the NVM\r
+ Express controller, then EFI_NOT_FOUND is returned.\r
\r
- @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
+ @param[in] This A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
@param[in,out] NamespaceId On input, a pointer to a legal NamespaceId for an NVM Express\r
namespace present on the NVM Express controller. On output, a\r
pointer to the next NamespaceId of an NVM Express namespace on\r
an NVM Express controller. An input value of 0xFFFFFFFF retrieves\r
the first NamespaceId for an NVM Express namespace present on an\r
NVM Express controller.\r
- @param[out] NamespaceUuid On output, the UUID associated with the next namespace, if a UUID\r
- is defined for that NamespaceId, otherwise, zero is returned in\r
- this parameter. If the caller does not require a UUID, then a NULL\r
- pointer may be passed.\r
\r
- @retval EFI_SUCCESS The NamespaceId of the next Namespace was returned.\r
+ @retval EFI_SUCCESS The Namespace ID of the next Namespace was returned.\r
@retval EFI_NOT_FOUND There are no more namespaces defined on this controller.\r
- @retval EFI_INVALID_PARAMETER Namespace array is not a 0xFFFFFFFF and NamespaceId was not returned\r
- on a previous call to GetNextNamespace().\r
+ @retval EFI_INVALID_PARAMETER NamespaceId is an invalid value other than 0xFFFFFFFF.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
NvmExpressGetNextNamespace (\r
- IN NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
- IN OUT UINT32 *NamespaceId,\r
- OUT UINT64 *NamespaceUuid OPTIONAL\r
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
+ IN OUT UINT32 *NamespaceId\r
);\r
\r
/**\r
- Used to translate a device path node to a Target ID and LUN.\r
+ Used to translate a device path node to a namespace ID.\r
\r
- The NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamwspace() function determines the Namespace ID and Namespace UUID\r
- associated with the NVM Express SSD namespace described by DevicePath. If DevicePath is a device path node type\r
- that the NVM Express Pass Thru driver supports, then the NVM Express Pass Thru driver will attempt to translate\r
- the contents DevicePath into a Namespace ID and UUID. If this translation is successful, then that Namespace ID\r
- and UUID are returned in NamespaceID and NamespaceUUID, and EFI_SUCCESS is returned.\r
+ The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamespace() function determines the namespace ID associated with the\r
+ namespace described by DevicePath.\r
\r
- @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
+ If DevicePath is a device path node type that the NVM Express Pass Thru driver supports, then the NVM Express\r
+ Pass Thru driver will attempt to translate the contents DevicePath into a namespace ID.\r
+\r
+ If this translation is successful, then that namespace ID is returned in NamespaceId, and EFI_SUCCESS is returned\r
+\r
+ @param[in] This A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
@param[in] DevicePath A pointer to the device path node that describes an NVM Express namespace on\r
the NVM Express controller.\r
@param[out] NamespaceId The NVM Express namespace ID contained in the device path node.\r
- @param[out] NamespaceUuid The NVM Express namespace contained in the device path node.\r
\r
- @retval EFI_SUCCESS DevicePath was successfully translated to NamespaceId and NamespaceUuid.\r
- @retval EFI_INVALID_PARAMETER If DevicePath, NamespaceId, or NamespaceUuid are NULL, then EFI_INVALID_PARAMETER\r
- is returned.\r
+ @retval EFI_SUCCESS DevicePath was successfully translated to NamespaceId.\r
+ @retval EFI_INVALID_PARAMETER If DevicePath or NamespaceId are NULL, then EFI_INVALID_PARAMETER is returned.\r
@retval EFI_UNSUPPORTED If DevicePath is not a device path node type that the NVM Express Pass Thru driver\r
supports, then EFI_UNSUPPORTED is returned.\r
- @retval EFI_NOT_FOUND If DevicePath is a device path node type that the Nvm Express Pass Thru driver\r
- supports, but there is not a valid translation from DevicePath to a NamespaceID\r
- and NamespaceUuid, then EFI_NOT_FOUND is returned.\r
+ @retval EFI_NOT_FOUND If DevicePath is a device path node type that the NVM Express Pass Thru driver\r
+ supports, but there is not a valid translation from DevicePath to a namespace ID,\r
+ then EFI_NOT_FOUND is returned.\r
**/\r
EFI_STATUS\r
EFIAPI\r
NvmExpressGetNamespace (\r
- IN NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r
- OUT UINT32 *NamespaceId,\r
- OUT UINT64 *NamespaceUuid\r
+ OUT UINT32 *NamespaceId\r
);\r
\r
/**\r
Used to allocate and build a device path node for an NVM Express namespace on an NVM Express controller.\r
\r
- The NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() function allocates and builds a single device\r
+ The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() function allocates and builds a single device\r
path node for the NVM Express namespace specified by NamespaceId.\r
\r
- If the namespace device specified by NamespaceId is not valid , then EFI_NOT_FOUND is returned.\r
+ If the NamespaceId is not valid, then EFI_NOT_FOUND is returned.\r
\r
If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned.\r
\r
Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of DevicePath are\r
initialized to describe the NVM Express namespace specified by NamespaceId, and EFI_SUCCESS is returned.\r
\r
- @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
+ @param[in] This A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.\r
@param[in] NamespaceId The NVM Express namespace ID for which a device path node is to be\r
allocated and built. Caller must set the NamespaceId to zero if the\r
device path node will contain a valid UUID.\r
- @param[in] NamespaceUuid The NVM Express namespace UUID for which a device path node is to be\r
- allocated and built. UUID will only be valid of the Namespace ID is zero.\r
@param[in,out] DevicePath A pointer to a single device path node that describes the NVM Express\r
namespace specified by NamespaceId. This function is responsible for\r
allocating the buffer DevicePath with the boot service AllocatePool().\r
is finished with DevicePath.\r
@retval EFI_SUCCESS The device path node that describes the NVM Express namespace specified\r
by NamespaceId was allocated and returned in DevicePath.\r
- @retval EFI_NOT_FOUND The NVM Express namespace specified by NamespaceId does not exist on the\r
- NVM Express controller.\r
+ @retval EFI_NOT_FOUND The NamespaceId is not valid.\r
@retval EFI_INVALID_PARAMETER DevicePath is NULL.\r
@retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate the DevicePath node.\r
\r
EFI_STATUS\r
EFIAPI\r
NvmExpressBuildDevicePath (\r
- IN NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
+ IN EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL *This,\r
IN UINT32 NamespaceId,\r
- IN UINT64 NamespaceUuid,\r
IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath\r
);\r
\r
+/**\r
+ Dump the execution status from a given completion queue entry.\r
+\r
+ @param[in] Cq A pointer to the NVME_CQ item.\r
+\r
+**/\r
+VOID\r
+NvmeDumpStatus (\r
+ IN NVME_CQ *Cq\r
+ );\r
+\r
+/**\r
+ Register the shutdown notification through the ResetNotification protocol.\r
+\r
+ Register the shutdown notification when mNvmeControllerNumber increased from 0 to 1.\r
+**/\r
+VOID\r
+NvmeRegisterShutdownNotification (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Unregister the shutdown notification through the ResetNotification protocol.\r
+\r
+ Unregister the shutdown notification when mNvmeControllerNumber decreased from 1 to 0.\r
+**/\r
+VOID\r
+NvmeUnregisterShutdownNotification (\r
+ VOID\r
+ );\r
+\r
#endif\r
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