NVME_AQA Aqa;\r
NVME_ASQ Asq;\r
NVME_ACQ Acq;\r
-\r
+ UINT8 Sn[21];\r
+ UINT8 Mn[41];\r
//\r
// Save original PCI attributes and enable this controller.\r
//\r
//\r
// Dump NvmExpress Identify Controller Data\r
//\r
- Private->ControllerData->Sn[19] = 0;\r
- Private->ControllerData->Mn[39] = 0;\r
+ CopyMem (Sn, Private->ControllerData->Sn, sizeof (Private->ControllerData->Sn));\r
+ Sn[20] = 0;\r
+ CopyMem (Mn, Private->ControllerData->Mn, sizeof (Private->ControllerData->Mn));\r
+ Mn[40] = 0;\r
DEBUG ((EFI_D_INFO, " == NVME IDENTIFY CONTROLLER DATA ==\n"));\r
DEBUG ((EFI_D_INFO, " PCI VID : 0x%x\n", Private->ControllerData->Vid));\r
DEBUG ((EFI_D_INFO, " PCI SSVID : 0x%x\n", Private->ControllerData->Ssvid));\r
- DEBUG ((EFI_D_INFO, " SN : %a\n", (CHAR8 *)(Private->ControllerData->Sn)));\r
- DEBUG ((EFI_D_INFO, " MN : %a\n", (CHAR8 *)(Private->ControllerData->Mn)));\r
+ DEBUG ((EFI_D_INFO, " SN : %a\n", Sn));\r
+ DEBUG ((EFI_D_INFO, " MN : %a\n", Mn));\r
DEBUG ((EFI_D_INFO, " FR : 0x%x\n", *((UINT64*)Private->ControllerData->Fr)));\r
DEBUG ((EFI_D_INFO, " RAB : 0x%x\n", Private->ControllerData->Rab));\r
DEBUG ((EFI_D_INFO, " IEEE : 0x%x\n", *(UINT32*)Private->ControllerData->Ieee_oui));\r