Use REPORT_STATUS_CODExxx() macros directly.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / PciBusDxe / PciIo.c

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
index e7d4ae3e5595ce71e87c3d1ce1f793d910ced358..e4bde1ebe978a90944c27dfc1c9b8bc8f1d9bbc5 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciIo.c
@@ -1,7 +1,7 @@
 /** @file\r
   EFI PCI IO protocol functions implementation for PCI Bus module.\r
 \r
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -46,26 +46,6 @@ EFI_PCI_IO_PROTOCOL  mPciIoInterface = {
   NULL\r
 };\r
 \r
-/**\r
-  Report a error Status code of PCI bus driver controller.\r
-\r
-  @param PciIoDevice Pci device instance.\r
-  @param Code        Status code value.\r
-\r
-**/\r
-EFI_STATUS\r
-ReportErrorStatusCode (\r
-  IN PCI_IO_DEVICE               *PciIoDevice,\r
-  IN EFI_STATUS_CODE_VALUE       Code\r
-  )\r
-{\r
-  return REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
-          EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
-          Code,\r
-          PciIoDevice->DevicePath\r
-          );\r
-}\r
-\r
 /**\r
   Initializes a PCI I/O Instance.\r
 \r
@@ -292,7 +272,11 @@ PciIoPollMem (
                                            );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -391,7 +375,11 @@ PciIoPollIo (
                                            );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -451,8 +439,8 @@ PciIoMemRead (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }  \r
   \r
@@ -466,7 +454,11 @@ PciIoMemRead (
                                               );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -526,8 +518,8 @@ PciIoMemWrite (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }\r
 \r
@@ -540,7 +532,11 @@ PciIoMemWrite (
                                               );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -600,8 +596,8 @@ PciIoIoRead (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }    \r
 \r
@@ -614,7 +610,11 @@ PciIoIoRead (
                                               );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -674,8 +674,8 @@ PciIoIoWrite (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }  \r
 \r
@@ -688,7 +688,11 @@ PciIoIoWrite (
                                               );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -739,8 +743,8 @@ PciIoConfigRead (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }    \r
 \r
@@ -753,7 +757,11 @@ PciIoConfigRead (
                                                );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -804,8 +812,8 @@ PciIoConfigWrite (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }  \r
   \r
@@ -818,7 +826,11 @@ PciIoConfigWrite (
                                               );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -899,8 +911,8 @@ PciIoCopyMem (
   //  \r
   if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
     if ((SrcOffset & ((1 << (Width & 0x03)) - 1)) != 0 || (DestOffset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
-      Width &= (~0x03);\r
       Count *=  (UINTN)(1 << (Width & 0x03));\r
+      Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
     }\r
   }  \r
 \r
@@ -913,7 +925,11 @@ PciIoCopyMem (
                                           );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -976,7 +992,11 @@ PciIoMap (
                                           );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -1010,7 +1030,11 @@ PciIoUnmap (
                                           );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -1071,7 +1095,11 @@ PciIoAllocateBuffer (
                                           );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -1109,7 +1137,11 @@ PciIoFreeBuffer (
                                           );\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -1141,7 +1173,11 @@ PciIoFlush (
                                            PciIoDevice->PciRootBridgeIo\r
                                            );\r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r
@@ -1268,6 +1304,13 @@ ModifyRootBridgeAttributes (
     return EFI_UNSUPPORTED;\r
   }\r
 \r
+  //\r
+  // Mask off EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE & \r
+  // EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM, which are not supported by PCI root bridge.\r
+  //\r
+  Attributes &= ~(UINT64)(EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE |\r
+                          EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM);\r
+\r
   //\r
   // Record the new attribute of the Root Bridge\r
   //\r
@@ -1522,6 +1565,38 @@ PciIoAttributes (
       );\r
   }\r
 \r
+  //\r
+  // Check VGA and VGA16, they can not be set at the same time\r
+  //\r
+  if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0         &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0)         ||\r
+      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0         &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||\r
+      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0)         ||\r
+      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
+  //\r
+  // workaround for PCI drivers which always set ISA_IO or VGA_IO attribute without detecting support of\r
+  // ISA_IO/ISA_IO_16 or VGA_IO/VGA_IO_16 to maintain backward-compatibility.\r
+  //\r
+  if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0) && \r
+      ((PciIoDevice->Supports & (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) \\r
+        == EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {\r
+    Attributes &= ~(UINT64)EFI_PCI_IO_ATTRIBUTE_VGA_IO;\r
+    Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_IO_16;\r
+  }\r
+\r
+  if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0) && \r
+      ((PciIoDevice->Supports & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) \\r
+        == EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) {\r
+    Attributes &= ~(UINT64)EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO;\r
+    Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16;\r
+  }\r
+\r
   //\r
   // If no attributes can be supported, then return.\r
   // Otherwise, set the attributes that it can support.\r
@@ -1542,20 +1617,6 @@ PciIoAttributes (
   Command       = 0;\r
   BridgeControl = 0;\r
 \r
-  //\r
-  // Check VGA and VGA16, they can not be set at the same time\r
-  //\r
-  if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0         &&\r
-       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0)         ||\r
-      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0         &&\r
-       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||\r
-      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
-       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0)         ||\r
-      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
-       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {\r
-    return EFI_UNSUPPORTED;\r
-  }\r
-\r
   //\r
   // For PPB & P2C, set relevant attribute bits\r
   //\r
@@ -1695,7 +1756,11 @@ PciIoAttributes (
   }\r
 \r
   if (EFI_ERROR (Status)) {\r
-    ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+    REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+      EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+      EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+      PciIoDevice->DevicePath\r
+      );\r
   }\r
 \r
   return Status;\r