MdeModulePkg/PciBus: Shadow option ROM after BARs are programmed

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / PciBusDxe / PciLib.c

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index b81f81a1368a028dfb1c5bbd6df4ca714318959a..7255bcfbbcea2d06f95deaeafdc4817386b13ded 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -24,6 +24,7 @@ CHAR16 *mBarTypeStr[] = {
   L"PMem32",\r
   L" Mem64",\r
   L"PMem64",\r
+  L" OpRom",\r
   L"    Io",\r
   L"   Mem",\r
   L"Unknow"\r
@@ -425,15 +426,9 @@ PciHostBridgeResourceAllocator (
   PCI_RESOURCE_NODE                              PMem32Pool;\r
   PCI_RESOURCE_NODE                              Mem64Pool;\r
   PCI_RESOURCE_NODE                              PMem64Pool;\r
-  BOOLEAN                                        ReAllocate;\r
   EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD        HandleExtendedData;\r
   EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD  AllocFailExtendedData;\r
 \r
-  //\r
-  // Reallocate flag\r
-  //\r
-  ReAllocate = FALSE;\r
-\r
   //\r
   // It may try several times if the resource allocation fails\r
   //\r
@@ -514,6 +509,17 @@ PciHostBridgeResourceAllocator (
                        PciResUsageTypical\r
                        );\r
 \r
+      //\r
+      // Get the max ROM size that the root bridge can process\r
+      // Insert to resource map so that there will be dedicate MEM32 resource range for Option ROM.\r
+      // All devices' Option ROM share the same MEM32 resource.\r
+      //\r
+      MaxOptionRomSize = GetMaxOptionRomSize (RootBridgeDev);\r
+      RootBridgeDev->PciBar[0].BarType   = PciBarTypeOpRom;\r
+      RootBridgeDev->PciBar[0].Length    = MaxOptionRomSize;\r
+      RootBridgeDev->PciBar[0].Alignment = MaxOptionRomSize - 1;\r
+      GetResourceFromDevice (RootBridgeDev, IoBridge, Mem32Bridge, PMem32Bridge, Mem64Bridge, PMem64Bridge);\r
+\r
       //\r
       // Create resourcemap by going through all the devices subject to this root bridge\r
       //\r
@@ -526,38 +532,6 @@ PciHostBridgeResourceAllocator (
         PMem64Bridge\r
         );\r
 \r
-      //\r
-      // Get the max ROM size that the root bridge can process\r
-      //\r
-      RootBridgeDev->RomSize = Mem32Bridge->Length;\r
-\r
-      //\r
-      // Skip to enlarge the resource request during realloction\r
-      //\r
-      if (!ReAllocate) {\r
-        //\r
-        // Get Max Option Rom size for current root bridge\r
-        //\r
-        MaxOptionRomSize = GetMaxOptionRomSize (RootBridgeDev);\r
-\r
-        //\r
-        // Enlarger the mem32 resource to accomdate the option rom\r
-        // if the mem32 resource is not enough to hold the rom\r
-        //\r
-        if (MaxOptionRomSize > Mem32Bridge->Length) {\r
-\r
-          Mem32Bridge->Length     = MaxOptionRomSize;\r
-          RootBridgeDev->RomSize  = MaxOptionRomSize;\r
-\r
-          //\r
-          // Alignment should be adjusted as well\r
-          //\r
-          if (Mem32Bridge->Alignment < MaxOptionRomSize - 1) {\r
-            Mem32Bridge->Alignment = MaxOptionRomSize - 1;\r
-          }\r
-        }\r
-      }\r
-\r
       //\r
       // Based on the all the resource tree, construct ACPI resource node to\r
       // submit the resource aperture to pci host bridge protocol\r
@@ -760,8 +734,6 @@ PciHostBridgeResourceAllocator (
       if (EFI_ERROR (Status)) {\r
         return Status;\r
       }\r
-\r
-      ReAllocate = TRUE;\r
     }\r
   }\r
   //\r
@@ -828,11 +800,6 @@ PciHostBridgeResourceAllocator (
       &PMem64Base\r
       );\r
 \r
-    //\r
-    // Process option rom for this root bridge\r
-    //\r
-    ProcessOptionRom (RootBridgeDev, Mem32Base, RootBridgeDev->RomSize);\r
-\r
     //\r
     // Create the entire system resource map from the information collected by\r
     // enumerator. Several resource tree was created\r
@@ -889,6 +856,20 @@ PciHostBridgeResourceAllocator (
       PMem64Bridge\r
       );\r
 \r
+    //\r
+    // Process Option ROM for this root bridge after all BARs are programmed.\r
+    // The PPB's MEM32 RANGE BAR is re-programmed to the Option ROM BAR Base in order to\r
+    // shadow the Option ROM of the devices under the PPB.\r
+    // After the shadow, Option ROM BAR decoding is turned off and the PPB's MEM32 RANGE\r
+    // BAR is restored back to the original value.\r
+    // The original value is programmed by ProgramResource() above.\r
+    //\r
+    DEBUG ((\r
+      DEBUG_INFO, "Process Option ROM: BAR Base/Length = %lx/%lx\n",\r
+      RootBridgeDev->PciBar[0].BaseAddress, RootBridgeDev->PciBar[0].Length\r
+      ));\r
+    ProcessOptionRom (RootBridgeDev, RootBridgeDev->PciBar[0].BaseAddress, RootBridgeDev->PciBar[0].Length);\r
+\r
     IoBridge    ->PciDev->PciBar[IoBridge    ->Bar].BaseAddress = IoBase;\r
     Mem32Bridge ->PciDev->PciBar[Mem32Bridge ->Bar].BaseAddress = Mem32Base;\r
     PMem32Bridge->PciDev->PciBar[PMem32Bridge->Bar].BaseAddress = PMem32Base;\r