/** @file\r
Internal library implementation for PCI Bus module.\r
\r
-Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
BridgeResource->PciDev->PciBar[BridgeResource->Bar].BaseAddress,\r
BridgeResource->Length, BridgeResource->Alignment\r
));\r
- for ( Link = BridgeResource->ChildList.ForwardLink\r
- ; Link != &BridgeResource->ChildList\r
- ; Link = Link->ForwardLink\r
+ for ( Link = GetFirstNode (&BridgeResource->ChildList)\r
+ ; !IsNull (&BridgeResource->ChildList, Link)\r
+ ; Link = GetNextNode (&BridgeResource->ChildList, Link)\r
) {\r
Resource = RESOURCE_NODE_FROM_LINK (Link);\r
if (Resource->ResourceUsage == PciResUsageTypical) {\r
Bar = Resource->Virtual ? Resource->PciDev->VfPciBar : Resource->PciDev->PciBar;\r
DEBUG ((\r
- EFI_D_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s ",\r
+ EFI_D_INFO, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s [%02x|%02x|%02x:",\r
Bar[Resource->Bar].BaseAddress, Resource->Length, Resource->Alignment,\r
IS_PCI_BRIDGE (&Resource->PciDev->Pci) ? L"PPB" :\r
IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci) ? L"P2C" :\r
- L"PCI"\r
+ L"PCI",\r
+ Resource->PciDev->BusNumber, Resource->PciDev->DeviceNumber,\r
+ Resource->PciDev->FunctionNumber\r
));\r
\r
if ((!IS_PCI_BRIDGE (&Resource->PciDev->Pci) && !IS_CARDBUS_BRIDGE (&Resource->PciDev->Pci)) ||\r
//\r
// The resource requirement comes from the device itself.\r
//\r
- DEBUG ((\r
- EFI_D_INFO, " [%02x|%02x|%02x:%02x]\n",\r
- Resource->PciDev->BusNumber, Resource->PciDev->DeviceNumber,\r
- Resource->PciDev->FunctionNumber, Bar[Resource->Bar].Offset\r
- ));\r
+ DEBUG ((EFI_D_INFO, "%02x]", Bar[Resource->Bar].Offset));\r
} else {\r
//\r
// The resource requirement comes from the subordinate devices.\r
//\r
- DEBUG ((\r
- EFI_D_INFO, " [%02x|%02x|%02x:**]\n",\r
- Resource->PciDev->BusNumber, Resource->PciDev->DeviceNumber,\r
- Resource->PciDev->FunctionNumber\r
- ));\r
+ DEBUG ((EFI_D_INFO, "**]"));\r
}\r
} else {\r
- DEBUG ((EFI_D_INFO, " Padding:Length = 0x%lx;\tAlignment = 0x%lx\n", Resource->Length, Resource->Alignment));\r
+ DEBUG ((EFI_D_INFO, " Base = Padding;\tLength = 0x%lx;\tAlignment = 0x%lx", Resource->Length, Resource->Alignment));\r
}\r
+ if (BridgeResource->ResType != Resource->ResType) {\r
+ DEBUG ((EFI_D_INFO, "; Type = %s", mBarTypeStr[MIN (Resource->ResType, PciBarTypeMaxType)]));\r
+ }\r
+ DEBUG ((EFI_D_INFO, "\n"));\r
}\r
}\r
}\r
/**\r
Find the corresponding resource node for the Device in child list of BridgeResource.\r
\r
- @param[in] Device Pointer to PCI_IO_DEVICE.\r
- @param[in] BridgeResource Pointer to PCI_RESOURCE_NODE.\r
+ @param[in] Device Pointer to PCI_IO_DEVICE.\r
+ @param[in] BridgeResource Pointer to PCI_RESOURCE_NODE.\r
+ @param[out] DeviceResources Pointer to a buffer to receive resources for the Device.\r
\r
- @return !NULL The corresponding resource node for the Device.\r
- @return NULL No corresponding resource node for the Device.\r
+ @return Count of the resource descriptors returned.\r
**/\r
-PCI_RESOURCE_NODE *\r
+UINTN\r
FindResourceNode (\r
- IN PCI_IO_DEVICE *Device,\r
- IN PCI_RESOURCE_NODE *BridgeResource\r
+ IN PCI_IO_DEVICE *Device,\r
+ IN PCI_RESOURCE_NODE *BridgeResource,\r
+ OUT PCI_RESOURCE_NODE **DeviceResources OPTIONAL\r
)\r
{\r
LIST_ENTRY *Link;\r
PCI_RESOURCE_NODE *Resource;\r
+ UINTN Count;\r
\r
+ Count = 0;\r
for ( Link = BridgeResource->ChildList.ForwardLink\r
; Link != &BridgeResource->ChildList\r
; Link = Link->ForwardLink\r
) {\r
Resource = RESOURCE_NODE_FROM_LINK (Link);\r
if (Resource->PciDev == Device) {\r
- return Resource;\r
+ if (DeviceResources != NULL) {\r
+ DeviceResources[Count] = Resource;\r
+ }\r
+ Count++;\r
}\r
}\r
\r
- return NULL;\r
+ return Count;\r
}\r
\r
/**\r
Dump the resource map of all the devices under Bridge.\r
\r
- @param[in] Bridge Bridge device instance.\r
- @param[in] IoNode IO resource descriptor for the bridge device.\r
- @param[in] Mem32Node Mem32 resource descriptor for the bridge device.\r
- @param[in] PMem32Node PMem32 resource descriptor for the bridge device.\r
- @param[in] Mem64Node Mem64 resource descriptor for the bridge device.\r
- @param[in] PMem64Node PMem64 resource descriptor for the bridge device.\r
+ @param[in] Bridge Bridge device instance.\r
+ @param[in] Resources Resource descriptors for the bridge device.\r
+ @param[in] ResourceCount Count of resource descriptors.\r
**/\r
VOID\r
DumpResourceMap (\r
IN PCI_IO_DEVICE *Bridge,\r
- IN PCI_RESOURCE_NODE *IoNode,\r
- IN PCI_RESOURCE_NODE *Mem32Node,\r
- IN PCI_RESOURCE_NODE *PMem32Node,\r
- IN PCI_RESOURCE_NODE *Mem64Node,\r
- IN PCI_RESOURCE_NODE *PMem64Node\r
+ IN PCI_RESOURCE_NODE **Resources,\r
+ IN UINTN ResourceCount\r
)\r
{\r
- EFI_STATUS Status;\r
- LIST_ENTRY *Link;\r
- PCI_IO_DEVICE *Device;\r
- PCI_RESOURCE_NODE *ChildIoNode;\r
- PCI_RESOURCE_NODE *ChildMem32Node;\r
- PCI_RESOURCE_NODE *ChildPMem32Node;\r
- PCI_RESOURCE_NODE *ChildMem64Node;\r
- PCI_RESOURCE_NODE *ChildPMem64Node;\r
- EFI_DEVICE_PATH_TO_TEXT_PROTOCOL *ToText;\r
- CHAR16 *Str;\r
+ EFI_STATUS Status;\r
+ LIST_ENTRY *Link;\r
+ PCI_IO_DEVICE *Device;\r
+ UINTN Index;\r
+ CHAR16 *Str;\r
+ PCI_RESOURCE_NODE **ChildResources;\r
+ UINTN ChildResourceCount;\r
\r
DEBUG ((EFI_D_INFO, "PciBus: Resource Map for "));\r
\r
Bridge->BusNumber, Bridge->DeviceNumber, Bridge->FunctionNumber\r
));\r
} else {\r
- Status = gBS->LocateProtocol (\r
- &gEfiDevicePathToTextProtocolGuid,\r
- NULL,\r
- (VOID **) &ToText\r
- );\r
- Str = NULL;\r
- if (!EFI_ERROR (Status)) {\r
- Str = ToText->ConvertDevicePathToText (\r
- DevicePathFromHandle (Bridge->Handle),\r
- FALSE,\r
- FALSE\r
- );\r
- }\r
+ Str = ConvertDevicePathToText (\r
+ DevicePathFromHandle (Bridge->Handle),\r
+ FALSE,\r
+ FALSE\r
+ );\r
DEBUG ((EFI_D_INFO, "Root Bridge %s\n", Str != NULL ? Str : L""));\r
if (Str != NULL) {\r
FreePool (Str);\r
}\r
}\r
\r
- DumpBridgeResource (IoNode);\r
- DumpBridgeResource (Mem32Node);\r
- DumpBridgeResource (PMem32Node);\r
- DumpBridgeResource (Mem64Node);\r
- DumpBridgeResource (PMem64Node);\r
+ for (Index = 0; Index < ResourceCount; Index++) {\r
+ DumpBridgeResource (Resources[Index]);\r
+ }\r
DEBUG ((EFI_D_INFO, "\n"));\r
\r
for ( Link = Bridge->ChildList.ForwardLink\r
Device = PCI_IO_DEVICE_FROM_LINK (Link);\r
if (IS_PCI_BRIDGE (&Device->Pci)) {\r
\r
- ChildIoNode = (IoNode == NULL ? NULL : FindResourceNode (Device, IoNode));\r
- ChildMem32Node = (Mem32Node == NULL ? NULL : FindResourceNode (Device, Mem32Node));\r
- ChildPMem32Node = (PMem32Node == NULL ? NULL : FindResourceNode (Device, PMem32Node));\r
- ChildMem64Node = (Mem64Node == NULL ? NULL : FindResourceNode (Device, Mem64Node));\r
- ChildPMem64Node = (PMem64Node == NULL ? NULL : FindResourceNode (Device, PMem64Node));\r
-\r
- DumpResourceMap (\r
- Device,\r
- ChildIoNode,\r
- ChildMem32Node,\r
- ChildPMem32Node,\r
- ChildMem64Node,\r
- ChildPMem64Node\r
- );\r
+ ChildResourceCount = 0;\r
+ for (Index = 0; Index < ResourceCount; Index++) {\r
+ ChildResourceCount += FindResourceNode (Device, Resources[Index], NULL);\r
+ }\r
+ ChildResources = AllocatePool (sizeof (PCI_RESOURCE_NODE *) * ChildResourceCount);\r
+ ASSERT (ChildResources != NULL);\r
+ ChildResourceCount = 0;\r
+ for (Index = 0; Index < ResourceCount; Index++) {\r
+ ChildResourceCount += FindResourceNode (Device, Resources[Index], &ChildResources[ChildResourceCount]);\r
+ }\r
+\r
+ DumpResourceMap (Device, ChildResources, ChildResourceCount);\r
+ FreePool (ChildResources);\r
}\r
}\r
}\r
//\r
\r
//\r
- // If non-stardard PCI Bridge I/O window alignment is supported,\r
+ // If non-standard PCI Bridge I/O window alignment is supported,\r
// set I/O aligment to minimum possible alignment for root bridge.\r
//\r
IoBridge = CreateResourceNode (\r
}\r
\r
//\r
- // Based on the all the resource tree, contruct ACPI resource node to\r
+ // Based on the all the resource tree, construct ACPI resource node to\r
// submit the resource aperture to pci host bridge protocol\r
//\r
Status = ConstructAcpiResourceRequestor (\r
//\r
// Notify pci bus driver starts to program the resource\r
//\r
- NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);\r
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeSetResources);\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
RootBridgeDev = NULL;\r
\r
// Create the entire system resource map from the information collected by\r
// enumerator. Several resource tree was created\r
//\r
- IoBridge = FindResourceNode (RootBridgeDev, &IoPool);\r
- Mem32Bridge = FindResourceNode (RootBridgeDev, &Mem32Pool);\r
- PMem32Bridge = FindResourceNode (RootBridgeDev, &PMem32Pool);\r
- Mem64Bridge = FindResourceNode (RootBridgeDev, &Mem64Pool);\r
- PMem64Bridge = FindResourceNode (RootBridgeDev, &PMem64Pool);\r
+ FindResourceNode (RootBridgeDev, &IoPool, &IoBridge);\r
+ FindResourceNode (RootBridgeDev, &Mem32Pool, &Mem32Bridge);\r
+ FindResourceNode (RootBridgeDev, &PMem32Pool, &PMem32Bridge);\r
+ FindResourceNode (RootBridgeDev, &Mem64Pool, &Mem64Bridge);\r
+ FindResourceNode (RootBridgeDev, &PMem64Pool, &PMem64Bridge);\r
\r
ASSERT (IoBridge != NULL);\r
ASSERT (Mem32Bridge != NULL);\r
// Dump the resource map for current root bridge\r
//\r
DEBUG_CODE (\r
- DumpResourceMap (\r
- RootBridgeDev,\r
- IoBridge,\r
- Mem32Bridge,\r
- PMem32Bridge,\r
- Mem64Bridge,\r
- PMem64Bridge\r
- );\r
+ PCI_RESOURCE_NODE *Resources[5];\r
+ Resources[0] = IoBridge;\r
+ Resources[1] = Mem32Bridge;\r
+ Resources[2] = PMem32Bridge;\r
+ Resources[3] = Mem64Bridge;\r
+ Resources[4] = PMem64Bridge;\r
+ DumpResourceMap (RootBridgeDev, Resources, sizeof (Resources) / sizeof (Resources[0]));\r
);\r
\r
FreePool (AcpiConfig);\r
//\r
// Notify the resource allocation phase is to end\r
//\r
- NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);\r
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeEndResourceAllocation);\r
\r
- return EFI_SUCCESS;\r
+ return Status;\r
}\r
\r
/**\r
UINT8 Device;\r
UINT8 Func;\r
UINT64 Address;\r
- UINTN SecondBus;\r
+ UINT8 SecondBus;\r
+ UINT8 PaddedSubBus;\r
UINT16 Register;\r
UINTN HpIndex;\r
PCI_IO_DEVICE *PciDevice;\r
Func\r
);\r
\r
+ if (EFI_ERROR (Status) && Func == 0) {\r
+ //\r
+ // go to next device if there is no Function 0\r
+ //\r
+ break;\r
+ }\r
+\r
if (EFI_ERROR (Status)) {\r
continue;\r
}\r
\r
Status = PciScanBus (\r
PciDevice,\r
- (UINT8) (SecondBus),\r
+ SecondBus,\r
SubBusNumber,\r
PaddedBusRange\r
);\r
if ((Attributes == EfiPaddingPciRootBridge) &&\r
(State & EFI_HPC_STATE_ENABLED) != 0 &&\r
(State & EFI_HPC_STATE_INITIALIZED) != 0) {\r
- *PaddedBusRange = (UINT8) ((UINT8) (BusRange) +*PaddedBusRange);\r
+ *PaddedBusRange = (UINT8) ((UINT8) (BusRange) + *PaddedBusRange);\r
} else {\r
- Status = PciAllocateBusNumber (PciDevice, *SubBusNumber, (UINT8) (BusRange), SubBusNumber);\r
+ //\r
+ // Reserve the larger one between the actual occupied bus number and padded bus number\r
+ //\r
+ Status = PciAllocateBusNumber (PciDevice, SecondBus, (UINT8) (BusRange), &PaddedSubBus);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+ *SubBusNumber = MAX (PaddedSubBus, *SubBusNumber);\r
}\r
}\r
\r
//\r
// Notify the bus allocation phase is about to start\r
//\r
- NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);\r
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
DEBUG((EFI_D_INFO, "PCI Bus First Scanning\n"));\r
RootBridgeHandle = NULL;\r
//\r
// Notify the bus allocation phase is about to start for the 2nd time\r
//\r
- NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);\r
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginBusAllocation);\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
DEBUG((EFI_D_INFO, "PCI Bus Second Scanning\n"));\r
RootBridgeHandle = NULL;\r
//\r
// Notify the resource allocation phase is to start\r
//\r
- NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);\r
+ Status = NotifyPhase (PciResAlloc, EfiPciHostBridgeBeginResourceAllocation);\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
RootBridgeHandle = NULL;\r
while (PciResAlloc->GetNextRootBridge (PciResAlloc, &RootBridgeHandle) == EFI_SUCCESS) {\r
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