--- /dev/null
+/** @file\r
+ Header file for PciSioSerial Driver\r
+\r
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _SERIAL_H_\r
+#define _SERIAL_H_\r
+\r
+\r
+#include <Uefi.h>\r
+\r
+#include <IndustryStandard/Pci.h>\r
+\r
+#include <Protocol/SuperIo.h>\r
+#include <Protocol/PciIo.h>\r
+#include <Protocol/SerialIo.h>\r
+#include <Protocol/DevicePath.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/UefiDriverEntryPoint.h>\r
+#include <Library/UefiLib.h>\r
+#include <Library/DevicePathLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/ReportStatusCodeLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/PrintLib.h>\r
+\r
+//\r
+// Driver Binding Externs\r
+//\r
+extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;\r
+extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName;\r
+extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2;\r
+\r
+#define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d"\r
+#define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d"\r
+#define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS)\r
+\r
+//\r
+// Internal Data Structures\r
+//\r
+#define TIMEOUT_STALL_INTERVAL 10\r
+\r
+#pragma pack(1)\r
+///\r
+/// PcdPciSerialParameters contains zero or more instances of the below structure.\r
+/// If a PCI device contains multiple UARTs, PcdPciSerialParameters needs to contain\r
+/// two instances of the below structure, with the VendorId and DeviceId equals to the\r
+/// device ID and vendor ID of the device. If the PCI device uses the first two BARs\r
+/// to support multiple UARTs, BarIndex of first instance equals to 0 and BarIndex of\r
+/// second one equals to 1; if the PCI device uses the first BAR to support multiple\r
+/// UARTs, BarIndex of both instance equals to 0 and Offset of first instance equals\r
+/// to 0 while Offset of second one equals to some value bigger or equal to 8.\r
+/// For certain UART whose register needs to be accessed in DWORD aligned address,\r
+/// RegisterStride equals to 4.\r
+///\r
+typedef struct {\r
+ UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.\r
+ UINT16 DeviceId; ///< Device ID to match the PCI device\r
+ UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz\r
+ UINT64 Offset; ///< The byte offset into to the BAR\r
+ UINT8 BarIndex; ///< Which BAR to get the UART base address\r
+ UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.\r
+ UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
+ UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r
+ UINT8 Reserved[2];\r
+} PCI_SERIAL_PARAMETER;\r
+#pragma pack()\r
+\r
+#define SERIAL_MAX_FIFO_SIZE 17 ///< Actual FIFO size is 16. FIFO based on circular wastes one unit.\r
+typedef struct {\r
+ UINT16 Head; ///< Head pointer of the FIFO. Empty when (Head == Tail).\r
+ UINT16 Tail; ///< Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head).\r
+ UINT8 Data[SERIAL_MAX_FIFO_SIZE]; ///< Store the FIFO data.\r
+} SERIAL_DEV_FIFO;\r
+\r
+typedef union {\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_SIO_PROTOCOL *Sio;\r
+} PARENT_IO_PROTOCOL_PTR;\r
+\r
+typedef struct {\r
+ EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance.\r
+ UINTN ChildCount; // Count of child SerialIo instance.\r
+ UINT64 PciAttributes; // Original PCI attributes.\r
+} PCI_DEVICE_INFO;\r
+\r
+typedef struct {\r
+ UINT32 Signature;\r
+ EFI_HANDLE Handle;\r
+ EFI_SERIAL_IO_PROTOCOL SerialIo;\r
+ EFI_SERIAL_IO_MODE SerialMode;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+\r
+ EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r
+ UART_DEVICE_PATH UartDevicePath;\r
+\r
+ EFI_PHYSICAL_ADDRESS BaseAddress; ///< UART base address\r
+ BOOLEAN MmioAccess; ///< TRUE for MMIO, FALSE for IO\r
+ UINT8 RegisterStride; ///< UART Register Stride\r
+ UINT32 ClockRate; ///< UART clock rate\r
+\r
+ UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes.\r
+ SERIAL_DEV_FIFO Receive; ///< The FIFO used to store received data\r
+\r
+ UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes.\r
+ SERIAL_DEV_FIFO Transmit; ///< The FIFO used to store to-transmit data\r
+\r
+ BOOLEAN SoftwareLoopbackEnable;\r
+ BOOLEAN HardwareFlowControl;\r
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
+ BOOLEAN ContainsControllerNode; ///< TRUE if the device produced contains Controller node\r
+ UINT32 Instance;\r
+ PCI_DEVICE_INFO *PciDeviceInfo;\r
+} SERIAL_DEV;\r
+\r
+#define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd')\r
+#define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)\r
+\r
+//\r
+// Serial Driver Defaults\r
+//\r
+#define SERIAL_PORT_DEFAULT_TIMEOUT 1000000\r
+#define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \\r
+ EFI_SERIAL_DATA_SET_READY | \\r
+ EFI_SERIAL_RING_INDICATE | \\r
+ EFI_SERIAL_CARRIER_DETECT | \\r
+ EFI_SERIAL_REQUEST_TO_SEND | \\r
+ EFI_SERIAL_DATA_TERMINAL_READY | \\r
+ EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE | \\r
+ EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE | \\r
+ EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE | \\r
+ EFI_SERIAL_OUTPUT_BUFFER_EMPTY | \\r
+ EFI_SERIAL_INPUT_BUFFER_EMPTY)\r
+\r
+#define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS\r
+#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds\r
+//\r
+// UART Registers\r
+//\r
+#define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register\r
+#define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register\r
+#define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB\r
+#define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB\r
+#define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register\r
+#define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register\r
+#define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register\r
+#define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register\r
+#define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register\r
+#define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register\r
+#define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register\r
+#define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register\r
+#pragma pack(1)\r
+\r
+///\r
+/// Interrupt Enable Register\r
+///\r
+typedef union {\r
+ struct {\r
+ UINT8 Ravie : 1; ///< Receiver Data Available Interrupt Enable\r
+ UINT8 Theie : 1; ///< Transmistter Holding Register Empty Interrupt Enable\r
+ UINT8 Rie : 1; ///< Receiver Interrupt Enable\r
+ UINT8 Mie : 1; ///< Modem Interrupt Enable\r
+ UINT8 Reserved : 4;\r
+ } Bits;\r
+ UINT8 Data;\r
+} SERIAL_PORT_IER;\r
+\r
+///\r
+/// FIFO Control Register\r
+///\r
+typedef union {\r
+ struct {\r
+ UINT8 TrFIFOE : 1; ///< Transmit and Receive FIFO Enable\r
+ UINT8 ResetRF : 1; ///< Reset Reciever FIFO\r
+ UINT8 ResetTF : 1; ///< Reset Transmistter FIFO\r
+ UINT8 Dms : 1; ///< DMA Mode Select\r
+ UINT8 Reserved : 1;\r
+ UINT8 TrFIFO64 : 1; ///< Enable 64 byte FIFO\r
+ UINT8 Rtb : 2; ///< Receive Trigger Bits\r
+ } Bits;\r
+ UINT8 Data;\r
+} SERIAL_PORT_FCR;\r
+\r
+///\r
+/// Line Control Register\r
+///\r
+typedef union {\r
+ struct {\r
+ UINT8 SerialDB : 2; ///< Number of Serial Data Bits\r
+ UINT8 StopB : 1; ///< Number of Stop Bits\r
+ UINT8 ParEn : 1; ///< Parity Enable\r
+ UINT8 EvenPar : 1; ///< Even Parity Select\r
+ UINT8 SticPar : 1; ///< Sticky Parity\r
+ UINT8 BrCon : 1; ///< Break Control\r
+ UINT8 DLab : 1; ///< Divisor Latch Access Bit\r
+ } Bits;\r
+ UINT8 Data;\r
+} SERIAL_PORT_LCR;\r
+\r
+///\r
+/// Modem Control Register\r
+///\r
+typedef union {\r
+ struct {\r
+ UINT8 DtrC : 1; ///< Data Terminal Ready Control\r
+ UINT8 Rts : 1; ///< Request To Send Control\r
+ UINT8 Out1 : 1; ///< Output1\r
+ UINT8 Out2 : 1; ///< Output2, used to disable interrupt\r
+ UINT8 Lme : 1; ///< Loopback Mode Enable\r
+ UINT8 Reserved : 3;\r
+ } Bits;\r
+ UINT8 Data;\r
+} SERIAL_PORT_MCR;\r
+\r
+///\r
+/// Line Status Register\r
+///\r
+typedef union {\r
+ struct {\r
+ UINT8 Dr : 1; ///< Receiver Data Ready Status\r
+ UINT8 Oe : 1; ///< Overrun Error Status\r
+ UINT8 Pe : 1; ///< Parity Error Status\r
+ UINT8 Fe : 1; ///< Framing Error Status\r
+ UINT8 Bi : 1; ///< Break Interrupt Status\r
+ UINT8 Thre : 1; ///< Transmistter Holding Register Status\r
+ UINT8 Temt : 1; ///< Transmitter Empty Status\r
+ UINT8 FIFOe : 1; ///< FIFO Error Status\r
+ } Bits;\r
+ UINT8 Data;\r
+} SERIAL_PORT_LSR;\r
+\r
+///\r
+/// Modem Status Register\r
+///\r
+typedef union {\r
+ struct {\r
+ UINT8 DeltaCTS : 1; ///< Delta Clear To Send Status\r
+ UINT8 DeltaDSR : 1; ///< Delta Data Set Ready Status\r
+ UINT8 TrailingEdgeRI : 1; ///< Trailing Edge of Ring Indicator Status\r
+ UINT8 DeltaDCD : 1; ///< Delta Data Carrier Detect Status\r
+ UINT8 Cts : 1; ///< Clear To Send Status\r
+ UINT8 Dsr : 1; ///< Data Set Ready Status\r
+ UINT8 Ri : 1; ///< Ring Indicator Status\r
+ UINT8 Dcd : 1; ///< Data Carrier Detect Status\r
+ } Bits;\r
+ UINT8 Data;\r
+} SERIAL_PORT_MSR;\r
+\r
+#pragma pack()\r
+//\r
+// Define serial register I/O macros\r
+//\r
+#define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR)\r
+#define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL)\r
+#define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM)\r
+#define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER)\r
+#define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR)\r
+#define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR)\r
+#define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR)\r
+#define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR)\r
+#define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR)\r
+#define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR)\r
+\r
+#define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D)\r
+#define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D)\r
+#define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D)\r
+#define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D)\r
+#define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D)\r
+#define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D)\r
+#define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D)\r
+#define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D)\r
+#define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D)\r
+#define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D)\r
+\r
+//\r
+// Prototypes\r
+// Driver model protocol interface\r
+//\r
+/**\r
+ Check to see if this driver supports the given controller\r
+\r
+ @param This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.\r
+ @param Controller The handle of the controller to test.\r
+ @param RemainingDevicePath A pointer to the remaining portion of a device path.\r
+\r
+ @return EFI_SUCCESS This driver can support the given controller\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialControllerDriverSupported (\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ );\r
+\r
+/**\r
+ Start to management the controller passed in\r
+\r
+ @param This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.\r
+ @param Controller The handle of the controller to test.\r
+ @param RemainingDevicePath A pointer to the remaining portion of a device path.\r
+\r
+ @return EFI_SUCCESS Driver is started successfully\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialControllerDriverStart (\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ );\r
+\r
+/**\r
+ Disconnect this driver with the controller, uninstall related protocol instance\r
+\r
+ @param This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.\r
+ @param Controller The handle of the controller to test.\r
+ @param NumberOfChildren Number of child device.\r
+ @param ChildHandleBuffer A pointer to the remaining portion of a device path.\r
+\r
+ @retval EFI_SUCCESS Operation successfully\r
+ @retval EFI_DEVICE_ERROR Cannot stop the driver successfully\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialControllerDriverStop (\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN UINTN NumberOfChildren,\r
+ IN EFI_HANDLE *ChildHandleBuffer\r
+ );\r
+\r
+//\r
+// Serial I/O Protocol Interface\r
+//\r
+/**\r
+ Reset serial device.\r
+\r
+ @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r
+\r
+ @retval EFI_SUCCESS Reset successfully\r
+ @retval EFI_DEVICE_ERROR Failed to reset\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialReset (\r
+ IN EFI_SERIAL_IO_PROTOCOL *This\r
+ );\r
+\r
+/**\r
+ Set new attributes to a serial device.\r
+\r
+ @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r
+ @param BaudRate The baudrate of the serial device\r
+ @param ReceiveFifoDepth The depth of receive FIFO buffer\r
+ @param Timeout The request timeout for a single char\r
+ @param Parity The type of parity used in serial device\r
+ @param DataBits Number of databits used in serial device\r
+ @param StopBits Number of stopbits used in serial device\r
+\r
+ @retval EFI_SUCCESS The new attributes were set\r
+ @retval EFI_INVALID_PARAMETERS One or more attributes have an unsupported value\r
+ @retval EFI_UNSUPPORTED Data Bits can not set to 5 or 6\r
+ @retval EFI_DEVICE_ERROR The serial device is not functioning correctly (no return)\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialSetAttributes (\r
+ IN EFI_SERIAL_IO_PROTOCOL *This,\r
+ IN UINT64 BaudRate,\r
+ IN UINT32 ReceiveFifoDepth,\r
+ IN UINT32 Timeout,\r
+ IN EFI_PARITY_TYPE Parity,\r
+ IN UINT8 DataBits,\r
+ IN EFI_STOP_BITS_TYPE StopBits\r
+ );\r
+\r
+/**\r
+ Set Control Bits.\r
+\r
+ @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r
+ @param Control Control bits that can be settable\r
+\r
+ @retval EFI_SUCCESS New Control bits were set successfully\r
+ @retval EFI_UNSUPPORTED The Control bits wanted to set are not supported\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialSetControl (\r
+ IN EFI_SERIAL_IO_PROTOCOL *This,\r
+ IN UINT32 Control\r
+ );\r
+\r
+/**\r
+ Get ControlBits.\r
+\r
+ @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r
+ @param Control Control signals of the serial device\r
+\r
+ @retval EFI_SUCCESS Get Control signals successfully\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialGetControl (\r
+ IN EFI_SERIAL_IO_PROTOCOL *This,\r
+ OUT UINT32 *Control\r
+ );\r
+\r
+/**\r
+ Write the specified number of bytes to serial device.\r
+\r
+ @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r
+ @param BufferSize On input the size of Buffer, on output the amount of\r
+ data actually written\r
+ @param Buffer The buffer of data to write\r
+\r
+ @retval EFI_SUCCESS The data were written successfully\r
+ @retval EFI_DEVICE_ERROR The device reported an error\r
+ @retval EFI_TIMEOUT The write operation was stopped due to timeout\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialWrite (\r
+ IN EFI_SERIAL_IO_PROTOCOL *This,\r
+ IN OUT UINTN *BufferSize,\r
+ IN VOID *Buffer\r
+ );\r
+\r
+/**\r
+ Read the specified number of bytes from serial device.\r
+\r
+ @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r
+ @param BufferSize On input the size of Buffer, on output the amount of\r
+ data returned in buffer\r
+ @param Buffer The buffer to return the data into\r
+\r
+ @retval EFI_SUCCESS The data were read successfully\r
+ @retval EFI_DEVICE_ERROR The device reported an error\r
+ @retval EFI_TIMEOUT The read operation was stopped due to timeout\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialRead (\r
+ IN EFI_SERIAL_IO_PROTOCOL *This,\r
+ IN OUT UINTN *BufferSize,\r
+ OUT VOID *Buffer\r
+ );\r
+\r
+//\r
+// Internal Functions\r
+//\r
+/**\r
+ Use scratchpad register to test if this serial port is present.\r
+\r
+ @param SerialDevice Pointer to serial device structure\r
+\r
+ @return if this serial port is present\r
+**/\r
+BOOLEAN\r
+SerialPresent (\r
+ IN SERIAL_DEV *SerialDevice\r
+ );\r
+\r
+/**\r
+ Detect whether specific FIFO is full or not.\r
+\r
+ @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r
+\r
+ @return whether specific FIFO is full or not\r
+\r
+**/\r
+BOOLEAN\r
+SerialFifoFull (\r
+ IN SERIAL_DEV_FIFO *Fifo\r
+ );\r
+\r
+/**\r
+ Detect whether specific FIFO is empty or not.\r
+ \r
+ @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r
+\r
+ @return whether specific FIFO is empty or not\r
+\r
+**/\r
+BOOLEAN\r
+SerialFifoEmpty (\r
+ IN SERIAL_DEV_FIFO *Fifo\r
+ );\r
+\r
+/**\r
+ Add data to specific FIFO.\r
+\r
+ @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r
+ @param Data the data added to FIFO\r
+\r
+ @retval EFI_SUCCESS Add data to specific FIFO successfully\r
+ @retval EFI_OUT_OF_RESOURCE Failed to add data because FIFO is already full\r
+\r
+**/\r
+EFI_STATUS\r
+SerialFifoAdd (\r
+ IN SERIAL_DEV_FIFO *Fifo,\r
+ IN UINT8 Data\r
+ );\r
+\r
+/**\r
+ Remove data from specific FIFO.\r
+\r
+ @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r
+ @param Data the data removed from FIFO\r
+\r
+ @retval EFI_SUCCESS Remove data from specific FIFO successfully\r
+ @retval EFI_OUT_OF_RESOURCE Failed to remove data because FIFO is empty\r
+\r
+**/\r
+EFI_STATUS\r
+SerialFifoRemove (\r
+ IN SERIAL_DEV_FIFO *Fifo,\r
+ OUT UINT8 *Data\r
+ );\r
+\r
+/**\r
+ Reads and writes all avaliable data.\r
+\r
+ @param SerialDevice The device to flush\r
+\r
+ @retval EFI_SUCCESS Data was read/written successfully.\r
+ @retval EFI_OUT_OF_RESOURCE Failed because software receive FIFO is full. Note, when\r
+ this happens, pending writes are not done.\r
+\r
+**/\r
+EFI_STATUS\r
+SerialReceiveTransmit (\r
+ IN SERIAL_DEV *SerialDevice\r
+ );\r
+\r
+/**\r
+ Read serial port.\r
+\r
+ @param SerialDev Pointer to serial device\r
+ @param Offset Offset in register group\r
+\r
+ @return Data read from serial port\r
+**/\r
+UINT8\r
+SerialReadRegister (\r
+ IN SERIAL_DEV *SerialDev,\r
+ IN UINT32 Offset\r
+ );\r
+\r
+/**\r
+ Write serial port.\r
+\r
+ @param SerialDev Pointer to serial device\r
+ @param Offset Offset in register group\r
+ @param Data data which is to be written to some serial port register\r
+**/\r
+VOID\r
+SerialWriteRegister (\r
+ IN SERIAL_DEV *SerialDev,\r
+ IN UINT32 Offset,\r
+ IN UINT8 Data\r
+ );\r
+\r
+\r
+//\r
+// EFI Component Name Functions\r
+//\r
+/**\r
+ Retrieves a Unicode string that is the user readable name of the driver.\r
+\r
+ This function retrieves the user readable name of a driver in the form of a\r
+ Unicode string. If the driver specified by This has a user readable name in\r
+ the language specified by Language, then a pointer to the driver name is\r
+ returned in DriverName, and EFI_SUCCESS is returned. If the driver specified\r
+ by This does not support the language specified by Language,\r
+ then EFI_UNSUPPORTED is returned.\r
+\r
+ @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r
+ EFI_COMPONENT_NAME_PROTOCOL instance.\r
+\r
+ @param Language[in] A pointer to a Null-terminated ASCII string\r
+ array indicating the language. This is the\r
+ language of the driver name that the caller is\r
+ requesting, and it must match one of the\r
+ languages specified in SupportedLanguages. The\r
+ number of languages supported by a driver is up\r
+ to the driver writer. Language is specified\r
+ in RFC 4646 or ISO 639-2 language code format.\r
+\r
+ @param DriverName[out] A pointer to the Unicode string to return.\r
+ This Unicode string is the name of the\r
+ driver specified by This in the language\r
+ specified by Language.\r
+\r
+ @retval EFI_SUCCESS The Unicode string for the Driver specified by\r
+ This and the language specified by Language was\r
+ returned in DriverName.\r
+\r
+ @retval EFI_INVALID_PARAMETER Language is NULL.\r
+\r
+ @retval EFI_INVALID_PARAMETER DriverName is NULL.\r
+\r
+ @retval EFI_UNSUPPORTED The driver specified by This does not support\r
+ the language specified by Language.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialComponentNameGetDriverName (\r
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
+ IN CHAR8 *Language,\r
+ OUT CHAR16 **DriverName\r
+ );\r
+\r
+\r
+/**\r
+ Retrieves a Unicode string that is the user readable name of the controller\r
+ that is being managed by a driver.\r
+\r
+ This function retrieves the user readable name of the controller specified by\r
+ ControllerHandle and ChildHandle in the form of a Unicode string. If the\r
+ driver specified by This has a user readable name in the language specified by\r
+ Language, then a pointer to the controller name is returned in ControllerName,\r
+ and EFI_SUCCESS is returned. If the driver specified by This is not currently\r
+ managing the controller specified by ControllerHandle and ChildHandle,\r
+ then EFI_UNSUPPORTED is returned. If the driver specified by This does not\r
+ support the language specified by Language, then EFI_UNSUPPORTED is returned.\r
+\r
+ @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r
+ EFI_COMPONENT_NAME_PROTOCOL instance.\r
+\r
+ @param ControllerHandle[in] The handle of a controller that the driver\r
+ specified by This is managing. This handle\r
+ specifies the controller whose name is to be\r
+ returned.\r
+\r
+ @param ChildHandle[in] The handle of the child controller to retrieve\r
+ the name of. This is an optional parameter that\r
+ may be NULL. It will be NULL for device\r
+ drivers. It will also be NULL for a bus drivers\r
+ that wish to retrieve the name of the bus\r
+ controller. It will not be NULL for a bus\r
+ driver that wishes to retrieve the name of a\r
+ child controller.\r
+\r
+ @param Language[in] A pointer to a Null-terminated ASCII string\r
+ array indicating the language. This is the\r
+ language of the driver name that the caller is\r
+ requesting, and it must match one of the\r
+ languages specified in SupportedLanguages. The\r
+ number of languages supported by a driver is up\r
+ to the driver writer. Language is specified in\r
+ RFC 4646 or ISO 639-2 language code format.\r
+\r
+ @param ControllerName[out] A pointer to the Unicode string to return.\r
+ This Unicode string is the name of the\r
+ controller specified by ControllerHandle and\r
+ ChildHandle in the language specified by\r
+ Language from the point of view of the driver\r
+ specified by This.\r
+\r
+ @retval EFI_SUCCESS The Unicode string for the user readable name in\r
+ the language specified by Language for the\r
+ driver specified by This was returned in\r
+ DriverName.\r
+\r
+ @retval EFI_INVALID_PARAMETER ControllerHandle is NULL.\r
+\r
+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid\r
+ EFI_HANDLE.\r
+\r
+ @retval EFI_INVALID_PARAMETER Language is NULL.\r
+\r
+ @retval EFI_INVALID_PARAMETER ControllerName is NULL.\r
+\r
+ @retval EFI_UNSUPPORTED The driver specified by This is not currently\r
+ managing the controller specified by\r
+ ControllerHandle and ChildHandle.\r
+\r
+ @retval EFI_UNSUPPORTED The driver specified by This does not support\r
+ the language specified by Language.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SerialComponentNameGetControllerName (\r
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
+ IN EFI_HANDLE ControllerHandle,\r
+ IN EFI_HANDLE ChildHandle OPTIONAL,\r
+ IN CHAR8 *Language,\r
+ OUT CHAR16 **ControllerName\r
+ );\r
+\r
+/**\r
+ Add the component name for the serial io device\r
+\r
+ @param SerialDevice A pointer to the SERIAL_DEV instance.\r
+ @param Uid Unique ID for the serial device.\r
+**/\r
+VOID\r
+AddName (\r
+ IN SERIAL_DEV *SerialDevice,\r
+ IN UINT32 Uid\r
+ );\r
+\r
+/**\r
+ Checks whether the UART parameters are valid and computes the Divisor.\r
+\r
+ @param ClockRate The clock rate of the serial device used to verify\r
+ the BaudRate. Do not verify the BaudRate if it's 0.\r
+ @param BaudRate The requested baudrate of the serial device.\r
+ @param DataBits Number of databits used in serial device.\r
+ @param Parity The type of parity used in serial device.\r
+ @param StopBits Number of stopbits used in serial device.\r
+ @param Divisor Return the divisor if ClockRate is not 0.\r
+ @param ActualBaudRate Return the actual supported baudrate without\r
+ exceeding BaudRate. NULL means baudrate degradation\r
+ is not allowed.\r
+ If the requested BaudRate is not supported, the routine\r
+ returns TRUE and the Actual Baud Rate when ActualBaudRate\r
+ is not NULL, returns FALSE when ActualBaudRate is NULL.\r
+\r
+ @retval TRUE The UART parameters are valid.\r
+ @retval FALSE The UART parameters are not valid.\r
+**/\r
+BOOLEAN\r
+VerifyUartParameters (\r
+ IN UINT32 ClockRate,\r
+ IN UINT64 BaudRate,\r
+ IN UINT8 DataBits,\r
+ IN EFI_PARITY_TYPE Parity,\r
+ IN EFI_STOP_BITS_TYPE StopBits,\r
+ OUT UINT64 *Divisor,\r
+ OUT UINT64 *ActualBaudRate\r
+ );\r
+\r
+/**\r
+ Skip the optional Controller device path node and return the\r
+ pointer to the next device path node.\r
+\r
+ @param DevicePath Pointer to the device path.\r
+ @param ContainsControllerNode Returns TRUE if the Controller device path exists.\r
+ @param ControllerNumber Returns the Controller Number if Controller device path exists.\r
+\r
+ @return Pointer to the next device path node.\r
+**/\r
+UART_DEVICE_PATH *\r
+SkipControllerDevicePathNode (\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r
+ BOOLEAN *ContainsControllerNode,\r
+ UINT32 *ControllerNumber\r
+ );\r
+\r
+/**\r
+ Check the device path node whether it's the Flow Control node or not.\r
+\r
+ @param[in] FlowControl The device path node to be checked.\r
+ \r
+ @retval TRUE It's the Flow Control node.\r
+ @retval FALSE It's not.\r
+\r
+**/\r
+BOOLEAN\r
+IsUartFlowControlDevicePathNode (\r
+ IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl\r
+ );\r
+#endif\r
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