MdeModulePkg\UfsBlockIoPei: UFS MMIO address size support both 32/64 bits

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UfsPciHcPei / UfsPciHcPei.c

diff --git a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c
index 447a05b5b2a2dac9f8592c9130a63165bf0ed669..86f1529eec6c13dcf59823ea8e984cd10becb83f 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c
+++ b/MdeModulePkg/Bus/Pci/UfsPciHcPei/UfsPciHcPei.c
@@ -76,6 +76,8 @@ InitializeUfsHcPeim (
   UINT16                   Device;\r
   UINT16                   Function;\r
   UINT32                   Size;\r
+  UINT64                   MmioSize;\r
+  UINT32                   BarAddr;\r
   UINT8                    SubClass;\r
   UINT8                    BaseClass;\r
   UFS_HC_PEI_PRIVATE_DATA  *Private;\r
@@ -106,6 +108,7 @@ InitializeUfsHcPeim (
   Private->PpiList              = mPpiList;\r
   Private->PpiList.Ppi          = &Private->UfsHostControllerPpi;\r
 \r
+  BarAddr = PcdGet32 (PcdUfsPciHostControllerMmioBase);\r
   for (Bus = 0; Bus < 256; Bus++) {\r
     for (Device = 0; Device < 32; Device++) {\r
       for (Function = 0; Function < 8; Function++) {\r
@@ -119,17 +122,57 @@ InitializeUfsHcPeim (
           PciAnd16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (UINT16)~(EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));\r
           PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), 0xFFFFFFFF);\r
           Size = PciRead32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET));\r
+\r
+          switch (Size & 0x07) {\r
+            case 0x0:\r
+              //\r
+              // Memory space: anywhere in 32 bit address space\r
+              //\r
+              MmioSize = (~(Size & 0xFFFFFFF0)) + 1;\r
+              break;\r
+            case 0x4:\r
+              //\r
+              // Memory space: anywhere in 64 bit address space\r
+              //\r
+              MmioSize = Size & 0xFFFFFFF0;\r
+              PciWrite32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0xFFFFFFFF);\r
+              Size = PciRead32 (PCI_LIB_ADDRESS(Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4));\r
+\r
+              //\r
+              // Fix the length to support some specific 64 bit BAR\r
+              //\r
+              Size |= ((UINT32)(-1) << HighBitSet32 (Size));\r
+\r
+              //\r
+              // Calculate the size of 64bit bar\r
+              //\r
+              MmioSize  |= LShiftU64 ((UINT64) Size, 32);\r
+              MmioSize  = (~(MmioSize)) + 1;\r
+\r
+              //\r
+              // Clean the high 32bits of this 64bit BAR to 0 as we only allow a 32bit BAR.\r
+              //\r
+              PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET + 4), 0);\r
+              break;\r
+            default:\r
+              //\r
+              // Unknown BAR type\r
+              //\r
+              ASSERT (FALSE);\r
+              continue;\r
+          };\r
           //\r
           // Assign resource to the Ufs Pci host controller's MMIO BAR.\r
           // Enable the Ufs Pci host controller by setting BME and MSE bits of PCI_CMD register.\r
           //\r
-          PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), (UINT32)(PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size * Private->TotalUfsHcs));\r
+          PciWrite32 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_BASE_ADDRESSREG_OFFSET), BarAddr);\r
           PciOr16 (PCI_LIB_ADDRESS (Bus, Device, Function, PCI_COMMAND_OFFSET), (EFI_PCI_COMMAND_BUS_MASTER | EFI_PCI_COMMAND_MEMORY_SPACE));\r
           //\r
           // Record the allocated Mmio base address.\r
           //\r
-          Private->UfsHcPciAddr[Private->TotalUfsHcs] = PcdGet32 (PcdUfsPciHostControllerMmioBase) + Size * Private->TotalUfsHcs;\r
+          Private->UfsHcPciAddr[Private->TotalUfsHcs] = BarAddr;\r
           Private->TotalUfsHcs++;\r
+          BarAddr += (UINT32)MmioSize;\r
           ASSERT (Private->TotalUfsHcs < MAX_UFS_HCS);\r
         }\r
       }\r