Fixed unexpected timeout in Usb MassStorage Driver.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / Uhci.c

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
index 1dee9765041119288536ab6cf77026c02386bdea..00108b87e2b218afad494582bd5ca99032c84d72 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
@@ -56,44 +56,33 @@ UhciReset (
     //\r
     // Stop schedule and set the Global Reset bit in the command register\r
     //\r
-    UhciStopHc (Uhc, STALL_1_SECOND);\r
+    UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
     UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
 \r
-    //\r
-    // Wait 50ms for root port to let reset complete\r
-    // See UHCI spec page122 Reset signaling\r
-    //\r
-    gBS->Stall (ROOT_PORT_REST_TIME);\r
+    gBS->Stall (UHC_ROOT_PORT_RESET_STALL);\r
 \r
     //\r
     // Clear the Global Reset bit to zero.\r
     //\r
     UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
 \r
-    //\r
-    // UHCI spec page120 reset recovery time\r
-    //\r
-    gBS->Stall (PORT_RESET_RECOVERY_TIME);\r
+    gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
     break;\r
 \r
   case EFI_USB_HC_RESET_HOST_CONTROLLER:\r
     //\r
     // Stop schedule and set Host Controller Reset bit to 1\r
     //\r
-    UhciStopHc (Uhc, STALL_1_SECOND);\r
+    UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
     UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);\r
 \r
-    //\r
-    // this bit will be reset by Host Controller when reset is completed.\r
-    // wait 10ms to let reset complete\r
-    //\r
-    gBS->Stall (PORT_RESET_RECOVERY_TIME);\r
+    gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
     break;\r
 \r
   default:\r
     goto ON_INVAILD_PARAMETER;\r
   }\r
-\r
+  \r
   //\r
   // Delete all old transactions on the USB bus, then\r
   // reinitialize the frame list\r
@@ -103,13 +92,13 @@ UhciReset (
   UhciInitFrameList (Uhc);\r
 \r
   gBS->RestoreTPL (OldTpl);\r
-\r
+  \r
   return EFI_SUCCESS;\r
 \r
 ON_INVAILD_PARAMETER:\r
-\r
+  \r
   gBS->RestoreTPL (OldTpl);\r
-\r
+  \r
   return EFI_INVALID_PARAMETER;\r
 }\r
 \r
@@ -202,7 +191,7 @@ UhciSetState (
 \r
   switch (State) {\r
   case EfiUsbHcStateHalt:\r
-    Status = UhciStopHc (Uhc, STALL_1_SECOND);\r
+    Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
     break;\r
 \r
   case EfiUsbHcStateOperational:\r
@@ -224,11 +213,11 @@ UhciSetState (
         UsbCmd |= USBCMD_FGR;\r
         UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
       }\r
-\r
+      \r
       //\r
       // wait 20ms to let resume complete (20ms is specified by UHCI spec)\r
       //\r
-      gBS->Stall (FORCE_GLOBAL_RESUME_TIME);\r
+      gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);\r
 \r
       //\r
       // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0\r
@@ -248,7 +237,7 @@ UhciSetState (
       Status = EFI_DEVICE_ERROR;\r
       goto ON_EXIT;\r
     }\r
-\r
+    \r
     //\r
     // Set Enter Global Suspend Mode bit to 1.\r
     //\r
@@ -2084,7 +2073,7 @@ UhciCleanDevUp (
   // Uninstall the USB_HC and USB_HC2 protocol, then disable the controller\r
   //\r
   Uhc = UHC_FROM_USB_HC_PROTO (This);\r
-  UhciStopHc (Uhc, STALL_1_SECOND);\r
+  UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
 \r
   gBS->UninstallProtocolInterface (\r
         Controller,\r
@@ -2188,7 +2177,7 @@ UhciDriverBindingStart (
   Status = gBS->SetTimer (\r
                   Uhc->AsyncIntMonitor,\r
                   TimerPeriodic,\r
-                  INTERRUPT_POLLING_TIME\r
+                  UHC_ASYNC_POLL_INTERVAL\r
                   );\r
 \r
   if (EFI_ERROR (Status)) {\r