\r
The UHCI driver model and HC protocol routines.\r
\r
-Copyright (c) 2004 - 2008, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "Uhci.h"\r
\r
-\r
-EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding = {\r
+EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding = {\r
UhciDriverBindingSupported,\r
UhciDriverBindingStart,\r
UhciDriverBindingStop,\r
EFI_STATUS\r
EFIAPI\r
Uhci2Reset (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT16 Attributes\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT16 Attributes\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- EFI_TPL OldTpl;\r
+ USB_HC_DEV *Uhc;\r
+ EFI_TPL OldTpl;\r
\r
if ((Attributes == EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG) ||\r
- (Attributes == EFI_USB_HC_RESET_HOST_WITH_DEBUG)) {\r
+ (Attributes == EFI_USB_HC_RESET_HOST_WITH_DEBUG))\r
+ {\r
return EFI_UNSUPPORTED;\r
}\r
\r
- Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
-\r
- OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
\r
- switch (Attributes) {\r
- case EFI_USB_HC_RESET_GLOBAL:\r
+ if (Uhc->DevicePath != NULL) {\r
//\r
- // Stop schedule and set the Global Reset bit in the command register\r
+ // Report Status Code to indicate reset happens\r
//\r
- UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
- UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_PROGRESS_CODE,\r
+ (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),\r
+ Uhc->DevicePath\r
+ );\r
+ }\r
\r
- gBS->Stall (UHC_ROOT_PORT_RESET_STALL);\r
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
\r
- //\r
- // Clear the Global Reset bit to zero.\r
- //\r
- UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
+ switch (Attributes) {\r
+ case EFI_USB_HC_RESET_GLOBAL:\r
+ //\r
+ // Stop schedule and set the Global Reset bit in the command register\r
+ //\r
+ UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
+ UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
\r
- gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
- break;\r
+ gBS->Stall (UHC_ROOT_PORT_RESET_STALL);\r
\r
- case EFI_USB_HC_RESET_HOST_CONTROLLER:\r
- //\r
- // Stop schedule and set Host Controller Reset bit to 1\r
- //\r
- UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
- UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);\r
+ //\r
+ // Clear the Global Reset bit to zero.\r
+ //\r
+ UhciClearRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_GRESET);\r
\r
- gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
- break;\r
+ gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
+ break;\r
\r
- default:\r
- goto ON_INVAILD_PARAMETER;\r
+ case EFI_USB_HC_RESET_HOST_CONTROLLER:\r
+ //\r
+ // Stop schedule and set Host Controller Reset bit to 1\r
+ //\r
+ UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
+ UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);\r
+\r
+ gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
+ break;\r
+\r
+ default:\r
+ goto ON_INVAILD_PARAMETER;\r
}\r
\r
//\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
-\r
/**\r
Retrieves current state of the USB host controller according to UEFI 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2GetState (\r
- IN CONST EFI_USB2_HC_PROTOCOL *This,\r
- OUT EFI_USB_HC_STATE *State\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ OUT EFI_USB_HC_STATE *State\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- UINT16 UsbSts;\r
- UINT16 UsbCmd;\r
+ USB_HC_DEV *Uhc;\r
+ UINT16 UsbSts;\r
+ UINT16 UsbCmd;\r
\r
if (State == NULL) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
\r
- UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
- UsbSts = UhciReadReg (Uhc->PciIo, USBSTS_OFFSET);\r
+ UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
+ UsbSts = UhciReadReg (Uhc->PciIo, USBSTS_OFFSET);\r
\r
- if ((UsbCmd & USBCMD_EGSM) !=0 ) {\r
+ if ((UsbCmd & USBCMD_EGSM) != 0 ) {\r
*State = EfiUsbHcStateSuspend;\r
-\r
} else if ((UsbSts & USBSTS_HCH) != 0) {\r
*State = EfiUsbHcStateHalt;\r
-\r
} else {\r
*State = EfiUsbHcStateOperational;\r
}\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Sets the USB host controller to a specific state according to UEFI 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2SetState (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN EFI_USB_HC_STATE State\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN EFI_USB_HC_STATE State\r
)\r
{\r
- EFI_USB_HC_STATE CurState;\r
- USB_HC_DEV *Uhc;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
- UINT16 UsbCmd;\r
+ EFI_USB_HC_STATE CurState;\r
+ USB_HC_DEV *Uhc;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
+ UINT16 UsbCmd;\r
\r
- Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
- Status = Uhci2GetState (This, &CurState);\r
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
+ Status = Uhci2GetState (This, &CurState);\r
\r
if (EFI_ERROR (Status)) {\r
return EFI_DEVICE_ERROR;\r
return EFI_SUCCESS;\r
}\r
\r
- Status = EFI_SUCCESS;\r
- OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
+ Status = EFI_SUCCESS;\r
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
\r
switch (State) {\r
- case EfiUsbHcStateHalt:\r
- Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
- break;\r
+ case EfiUsbHcStateHalt:\r
+ Status = UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
+ break;\r
\r
- case EfiUsbHcStateOperational:\r
- UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
+ case EfiUsbHcStateOperational:\r
+ UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
\r
- if (CurState == EfiUsbHcStateHalt) {\r
- //\r
- // Set Run/Stop bit to 1, also set the bandwidht reclamation\r
- // point to 64 bytes\r
- //\r
- UsbCmd |= USBCMD_RS | USBCMD_MAXP;\r
- UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
-\r
- } else if (CurState == EfiUsbHcStateSuspend) {\r
- //\r
- // If FGR(Force Global Resume) bit is 0, set it\r
- //\r
- if ((UsbCmd & USBCMD_FGR) == 0) {\r
- UsbCmd |= USBCMD_FGR;\r
+ if (CurState == EfiUsbHcStateHalt) {\r
+ //\r
+ // Set Run/Stop bit to 1, also set the bandwidht reclamation\r
+ // point to 64 bytes\r
+ //\r
+ UsbCmd |= USBCMD_RS | USBCMD_MAXP;\r
+ UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
+ } else if (CurState == EfiUsbHcStateSuspend) {\r
+ //\r
+ // If FGR(Force Global Resume) bit is 0, set it\r
+ //\r
+ if ((UsbCmd & USBCMD_FGR) == 0) {\r
+ UsbCmd |= USBCMD_FGR;\r
+ UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
+ }\r
+\r
+ //\r
+ // wait 20ms to let resume complete (20ms is specified by UHCI spec)\r
+ //\r
+ gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);\r
+\r
+ //\r
+ // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0\r
+ //\r
+ UsbCmd &= ~USBCMD_FGR;\r
+ UsbCmd &= ~USBCMD_EGSM;\r
+ UsbCmd |= USBCMD_RS;\r
UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
}\r
\r
- //\r
- // wait 20ms to let resume complete (20ms is specified by UHCI spec)\r
- //\r
- gBS->Stall (UHC_FORCE_GLOBAL_RESUME_STALL);\r
+ break;\r
+\r
+ case EfiUsbHcStateSuspend:\r
+ Status = Uhci2SetState (This, EfiUsbHcStateHalt);\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ Status = EFI_DEVICE_ERROR;\r
+ goto ON_EXIT;\r
+ }\r
\r
//\r
- // Write FGR bit to 0 and EGSM(Enter Global Suspend Mode) bit to 0\r
+ // Set Enter Global Suspend Mode bit to 1.\r
//\r
- UsbCmd &= ~USBCMD_FGR;\r
- UsbCmd &= ~USBCMD_EGSM;\r
- UsbCmd |= USBCMD_RS;\r
+ UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
+ UsbCmd |= USBCMD_EGSM;\r
UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
- }\r
-\r
- break;\r
-\r
- case EfiUsbHcStateSuspend:\r
- Status = Uhci2SetState (This, EfiUsbHcStateHalt);\r
-\r
- if (EFI_ERROR (Status)) {\r
- Status = EFI_DEVICE_ERROR;\r
- goto ON_EXIT;\r
- }\r
-\r
- //\r
- // Set Enter Global Suspend Mode bit to 1.\r
- //\r
- UsbCmd = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
- UsbCmd |= USBCMD_EGSM;\r
- UhciWriteReg (Uhc->PciIo, USBCMD_OFFSET, UsbCmd);\r
- break;\r
+ break;\r
\r
- default:\r
- Status = EFI_INVALID_PARAMETER;\r
- break;\r
+ default:\r
+ Status = EFI_INVALID_PARAMETER;\r
+ break;\r
}\r
\r
ON_EXIT:\r
OUT UINT8 *Is64BitCapable\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- UINT32 Offset;\r
- UINT16 PortSC;\r
- UINT32 Index;\r
+ USB_HC_DEV *Uhc;\r
+ UINT32 Offset;\r
+ UINT16 PortSC;\r
+ UINT32 Index;\r
\r
Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
\r
}\r
\r
*MaxSpeed = EFI_USB_SPEED_FULL;\r
- *Is64BitCapable = (UINT8) FALSE;\r
+ *Is64BitCapable = (UINT8)FALSE;\r
\r
*PortNumber = 0;\r
\r
for (Index = 0; Index < USB_MAX_ROOTHUB_PORT; Index++) {\r
- Offset = USBPORTSC_OFFSET + Index * 2;\r
- PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
+ Offset = USBPORTSC_OFFSET + Index * 2;\r
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
\r
//\r
// Port status's bit 7 is reserved and always returns 1 if\r
if (((PortSC & 0x80) == 0) || (PortSC == 0xFFFF)) {\r
break;\r
}\r
+\r
(*PortNumber)++;\r
}\r
\r
Uhc->RootPorts = *PortNumber;\r
\r
- DEBUG ((EFI_D_INFO, "Uhci2GetCapability: %d ports\n", (UINT32)Uhc->RootPorts));\r
+ DEBUG ((DEBUG_INFO, "Uhci2GetCapability: %d ports\n", (UINT32)Uhc->RootPorts));\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Retrieves the current status of a USB root hub port according to UEFI 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2GetRootHubPortStatus (\r
- IN CONST EFI_USB2_HC_PROTOCOL *This,\r
- IN CONST UINT8 PortNumber,\r
- OUT EFI_USB_PORT_STATUS *PortStatus\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 PortNumber,\r
+ OUT EFI_USB_PORT_STATUS *PortStatus\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- UINT32 Offset;\r
- UINT16 PortSC;\r
+ USB_HC_DEV *Uhc;\r
+ UINT32 Offset;\r
+ UINT16 PortSC;\r
\r
Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Offset = USBPORTSC_OFFSET + PortNumber * 2;\r
- PortStatus->PortStatus = 0;\r
- PortStatus->PortChangeStatus = 0;\r
+ Offset = USBPORTSC_OFFSET + PortNumber * 2;\r
+ PortStatus->PortStatus = 0;\r
+ PortStatus->PortChangeStatus = 0;\r
\r
- PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
\r
if ((PortSC & USBPORTSC_CCS) != 0) {\r
PortStatus->PortStatus |= USB_PORT_STAT_CONNECTION;\r
}\r
\r
if ((PortSC & USBPORTSC_SUSP) != 0) {\r
- DEBUG ((EFI_D_INFO, "Uhci2GetRootHubPortStatus: port %d is suspended\n", PortNumber));\r
+ DEBUG ((DEBUG_INFO, "Uhci2GetRootHubPortStatus: port %d is suspended\n", PortNumber));\r
PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Sets a feature for the specified root hub port according to UEFI 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2SetRootHubPortFeature (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 PortNumber,\r
- IN EFI_USB_PORT_FEATURE PortFeature\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 PortNumber,\r
+ IN EFI_USB_PORT_FEATURE PortFeature\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- EFI_TPL OldTpl;\r
- UINT32 Offset;\r
- UINT16 PortSC;\r
- UINT16 Command;\r
+ USB_HC_DEV *Uhc;\r
+ EFI_TPL OldTpl;\r
+ UINT32 Offset;\r
+ UINT16 PortSC;\r
+ UINT16 Command;\r
\r
Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Offset = USBPORTSC_OFFSET + PortNumber * 2;\r
+ Offset = USBPORTSC_OFFSET + PortNumber * 2;\r
\r
- OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
- PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
\r
switch (PortFeature) {\r
- case EfiUsbPortSuspend:\r
- Command = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
- if ((Command & USBCMD_EGSM) == 0) {\r
- //\r
- // if global suspend is not active, can set port suspend\r
- //\r
- PortSC &= 0xfff5;\r
- PortSC |= USBPORTSC_SUSP;\r
- }\r
- break;\r
+ case EfiUsbPortSuspend:\r
+ Command = UhciReadReg (Uhc->PciIo, USBCMD_OFFSET);\r
+ if ((Command & USBCMD_EGSM) == 0) {\r
+ //\r
+ // if global suspend is not active, can set port suspend\r
+ //\r
+ PortSC &= 0xfff5;\r
+ PortSC |= USBPORTSC_SUSP;\r
+ }\r
\r
- case EfiUsbPortReset:\r
- PortSC &= 0xfff5;\r
- PortSC |= USBPORTSC_PR;\r
- break;\r
+ break;\r
\r
- case EfiUsbPortPower:\r
- //\r
- // No action\r
- //\r
- break;\r
+ case EfiUsbPortReset:\r
+ PortSC &= 0xfff5;\r
+ PortSC |= USBPORTSC_PR;\r
+ break;\r
\r
- case EfiUsbPortEnable:\r
- PortSC &= 0xfff5;\r
- PortSC |= USBPORTSC_PED;\r
- break;\r
+ case EfiUsbPortPower:\r
+ //\r
+ // No action\r
+ //\r
+ break;\r
\r
- default:\r
- gBS->RestoreTPL (OldTpl);\r
- return EFI_INVALID_PARAMETER;\r
+ case EfiUsbPortEnable:\r
+ PortSC &= 0xfff5;\r
+ PortSC |= USBPORTSC_PED;\r
+ break;\r
+\r
+ default:\r
+ gBS->RestoreTPL (OldTpl);\r
+ return EFI_INVALID_PARAMETER;\r
}\r
\r
UhciWriteReg (Uhc->PciIo, Offset, PortSC);\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
Clears a feature for the specified root hub port according to Uefi 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2ClearRootHubPortFeature (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 PortNumber,\r
- IN EFI_USB_PORT_FEATURE PortFeature\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 PortNumber,\r
+ IN EFI_USB_PORT_FEATURE PortFeature\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- EFI_TPL OldTpl;\r
- UINT32 Offset;\r
- UINT16 PortSC;\r
+ USB_HC_DEV *Uhc;\r
+ EFI_TPL OldTpl;\r
+ UINT32 Offset;\r
+ UINT16 PortSC;\r
\r
Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Offset = USBPORTSC_OFFSET + PortNumber * 2;\r
+ Offset = USBPORTSC_OFFSET + PortNumber * 2;\r
\r
- OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
- PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
+ PortSC = UhciReadReg (Uhc->PciIo, Offset);\r
\r
switch (PortFeature) {\r
- case EfiUsbPortEnable:\r
- PortSC &= 0xfff5;\r
- PortSC &= ~USBPORTSC_PED;\r
- break;\r
+ case EfiUsbPortEnable:\r
+ PortSC &= 0xfff5;\r
+ PortSC &= ~USBPORTSC_PED;\r
+ break;\r
\r
- case EfiUsbPortSuspend:\r
- //\r
- // Cause a resume on the specified port if in suspend mode.\r
- //\r
- PortSC &= 0xfff5;\r
- PortSC &= ~USBPORTSC_SUSP;\r
- break;\r
+ case EfiUsbPortSuspend:\r
+ //\r
+ // Cause a resume on the specified port if in suspend mode.\r
+ //\r
+ PortSC &= 0xfff5;\r
+ PortSC &= ~USBPORTSC_SUSP;\r
+ break;\r
\r
- case EfiUsbPortPower:\r
- //\r
- // No action\r
- //\r
- break;\r
+ case EfiUsbPortPower:\r
+ //\r
+ // No action\r
+ //\r
+ break;\r
\r
- case EfiUsbPortReset:\r
- PortSC &= 0xfff5;\r
- PortSC &= ~USBPORTSC_PR;\r
- break;\r
+ case EfiUsbPortReset:\r
+ PortSC &= 0xfff5;\r
+ PortSC &= ~USBPORTSC_PR;\r
+ break;\r
\r
- case EfiUsbPortConnectChange:\r
- PortSC &= 0xfff5;\r
- PortSC |= USBPORTSC_CSC;\r
- break;\r
+ case EfiUsbPortConnectChange:\r
+ PortSC &= 0xfff5;\r
+ PortSC |= USBPORTSC_CSC;\r
+ break;\r
\r
- case EfiUsbPortEnableChange:\r
- PortSC &= 0xfff5;\r
- PortSC |= USBPORTSC_PEDC;\r
- break;\r
+ case EfiUsbPortEnableChange:\r
+ PortSC &= 0xfff5;\r
+ PortSC |= USBPORTSC_PEDC;\r
+ break;\r
\r
- case EfiUsbPortSuspendChange:\r
- //\r
- // Root hub does not support this\r
- //\r
- break;\r
+ case EfiUsbPortSuspendChange:\r
+ //\r
+ // Root hub does not support this\r
+ //\r
+ break;\r
\r
- case EfiUsbPortOverCurrentChange:\r
- //\r
- // Root hub does not support this\r
- //\r
- break;\r
+ case EfiUsbPortOverCurrentChange:\r
+ //\r
+ // Root hub does not support this\r
+ //\r
+ break;\r
\r
- case EfiUsbPortResetChange:\r
- //\r
- // Root hub does not support this\r
- //\r
- break;\r
+ case EfiUsbPortResetChange:\r
+ //\r
+ // Root hub does not support this\r
+ //\r
+ break;\r
\r
- default:\r
- gBS->RestoreTPL (OldTpl);\r
- return EFI_INVALID_PARAMETER;\r
+ default:\r
+ gBS->RestoreTPL (OldTpl);\r
+ return EFI_INVALID_PARAMETER;\r
}\r
\r
UhciWriteReg (Uhc->PciIo, Offset, PortSC);\r
return EFI_SUCCESS;\r
}\r
\r
-\r
/**\r
- Submits control transfer to a target USB device accroding to UEFI 2.0 spec.\r
+ Submits control transfer to a target USB device according to UEFI 2.0 spec.\r
\r
@param This A pointer to the EFI_USB2_HC_PROTOCOL instance.\r
@param DeviceAddress Target device address.\r
EFI_STATUS\r
EFIAPI\r
Uhci2ControlTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN EFI_USB_DEVICE_REQUEST *Request,\r
- IN EFI_USB_DATA_DIRECTION TransferDirection,\r
- IN OUT VOID *Data,\r
- IN OUT UINTN *DataLength,\r
- IN UINTN TimeOut,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 DeviceAddress,\r
+ IN UINT8 DeviceSpeed,\r
+ IN UINTN MaximumPacketLength,\r
+ IN EFI_USB_DEVICE_REQUEST *Request,\r
+ IN EFI_USB_DATA_DIRECTION TransferDirection,\r
+ IN OUT VOID *Data,\r
+ IN OUT UINTN *DataLength,\r
+ IN UINTN TimeOut,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
+ OUT UINT32 *TransferResult\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- UHCI_TD_SW *TDs;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
- UHCI_QH_RESULT QhResult;\r
- UINT8 PktId;\r
- UINT8 *RequestPhy;\r
- VOID *RequestMap;\r
- UINT8 *DataPhy;\r
- VOID *DataMap;\r
- BOOLEAN IsSlowDevice;\r
- UINTN TransferDataLength;\r
-\r
- Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
- TDs = NULL;\r
- DataPhy = NULL;\r
- DataMap = NULL;\r
- RequestPhy = NULL;\r
- RequestMap = NULL;\r
-\r
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
+ USB_HC_DEV *Uhc;\r
+ UHCI_TD_SW *TDs;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
+ UHCI_QH_RESULT QhResult;\r
+ UINT8 PktId;\r
+ UINT8 *RequestPhy;\r
+ VOID *RequestMap;\r
+ UINT8 *DataPhy;\r
+ VOID *DataMap;\r
+ BOOLEAN IsSlowDevice;\r
+ UINTN TransferDataLength;\r
+\r
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
+ TDs = NULL;\r
+ DataPhy = NULL;\r
+ DataMap = NULL;\r
+ RequestPhy = NULL;\r
+ RequestMap = NULL;\r
+\r
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
\r
//\r
// Parameters Checking\r
//\r
- if (Request == NULL || TransferResult == NULL) {\r
+ if ((Request == NULL) || (TransferResult == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
}\r
\r
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&\r
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {\r
-\r
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if ((TransferDirection != EfiUsbNoData) && (Data == NULL || DataLength == NULL)) {\r
+ if ((TransferDirection != EfiUsbNoData) && ((Data == NULL) || (DataLength == NULL))) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
Uhc,\r
DeviceAddress,\r
PktId,\r
+ (UINT8 *)Request,\r
RequestPhy,\r
+ (UINT8 *)Data,\r
DataPhy,\r
TransferDataLength,\r
- (UINT8) MaximumPacketLength,\r
+ (UINT8)MaximumPacketLength,\r
IsSlowDevice\r
);\r
\r
// the TD to corrosponding queue head, then check\r
// the execution result\r
//\r
- UhciLinkTdToQh (Uhc->CtrlQh, TDs);\r
+ UhciLinkTdToQh (Uhc, Uhc->CtrlQh, TDs);\r
Status = UhciExecuteTransfer (Uhc, Uhc->CtrlQh, TDs, TimeOut, IsSlowDevice, &QhResult);\r
UhciUnlinkTdFromQh (Uhc->CtrlQh, TDs);\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Submits bulk transfer to a bulk endpoint of a USB device.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2BulkTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN UINT8 DataBuffersNumber,\r
- IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],\r
- IN OUT UINTN *DataLength,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN TimeOut,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 DeviceAddress,\r
+ IN UINT8 EndPointAddress,\r
+ IN UINT8 DeviceSpeed,\r
+ IN UINTN MaximumPacketLength,\r
+ IN UINT8 DataBuffersNumber,\r
+ IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],\r
+ IN OUT UINTN *DataLength,\r
+ IN OUT UINT8 *DataToggle,\r
+ IN UINTN TimeOut,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
+ OUT UINT32 *TransferResult\r
)\r
{\r
EFI_USB_DATA_DIRECTION Direction;\r
}\r
\r
if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&\r
- (MaximumPacketLength != 32) && (MaximumPacketLength != 64)) {\r
+ (MaximumPacketLength != 32) && (MaximumPacketLength != 64))\r
+ {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
DeviceAddress,\r
EndPointAddress,\r
PktId,\r
+ (UINT8 *)*Data,\r
DataPhy,\r
*DataLength,\r
DataToggle,\r
- (UINT8) MaximumPacketLength,\r
+ (UINT8)MaximumPacketLength,\r
FALSE\r
);\r
\r
goto ON_EXIT;\r
}\r
\r
-\r
//\r
// Link the TDs to bulk queue head. According to the platfore\r
// defintion of UHCI_NO_BW_RECLAMATION, BulkQh is either configured\r
//\r
BulkQh = Uhc->BulkQh;\r
\r
- UhciLinkTdToQh (BulkQh, TDs);\r
+ UhciLinkTdToQh (Uhc, BulkQh, TDs);\r
Status = UhciExecuteTransfer (Uhc, BulkQh, TDs, TimeOut, FALSE, &QhResult);\r
UhciUnlinkTdFromQh (BulkQh, TDs);\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Submits an asynchronous interrupt transfer to an\r
interrupt endpoint of a USB device according to UEFI 2.0 spec.\r
EFI_STATUS\r
EFIAPI\r
Uhci2AsyncInterruptTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN BOOLEAN IsNewTransfer,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN PollingInterval,\r
- IN UINTN DataLength,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
- IN VOID *Context\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 DeviceAddress,\r
+ IN UINT8 EndPointAddress,\r
+ IN UINT8 DeviceSpeed,\r
+ IN UINTN MaximumPacketLength,\r
+ IN BOOLEAN IsNewTransfer,\r
+ IN OUT UINT8 *DataToggle,\r
+ IN UINTN PollingInterval,\r
+ IN UINTN DataLength,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
+ IN VOID *Context\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
- BOOLEAN IsSlowDevice;\r
- UHCI_QH_SW *Qh;\r
- UHCI_TD_SW *IntTds;\r
- EFI_TPL OldTpl;\r
- EFI_STATUS Status;\r
- UINT8 *DataPtr;\r
- UINT8 *DataPhy;\r
- VOID *DataMap;\r
- UINT8 PktId;\r
-\r
- Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
- Qh = NULL;\r
- IntTds = NULL;\r
- DataPtr = NULL;\r
- DataPhy = NULL;\r
- DataMap = NULL;\r
-\r
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
+ USB_HC_DEV *Uhc;\r
+ BOOLEAN IsSlowDevice;\r
+ UHCI_QH_SW *Qh;\r
+ UHCI_TD_SW *IntTds;\r
+ EFI_TPL OldTpl;\r
+ EFI_STATUS Status;\r
+ UINT8 *DataPtr;\r
+ UINT8 *DataPhy;\r
+ UINT8 PktId;\r
+\r
+ Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
+ Qh = NULL;\r
+ IntTds = NULL;\r
+ DataPtr = NULL;\r
+ DataPhy = NULL;\r
+\r
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
\r
if ((EndPointAddress & 0x80) == 0) {\r
return EFI_INVALID_PARAMETER;\r
return Status;\r
}\r
\r
- if (PollingInterval < 1 || PollingInterval > 255) {\r
+ if ((PollingInterval < 1) || (PollingInterval > 255)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
return EFI_DEVICE_ERROR;\r
}\r
\r
+ if ((EndPointAddress & 0x80) == 0) {\r
+ PktId = OUTPUT_PACKET_ID;\r
+ } else {\r
+ PktId = INPUT_PACKET_ID;\r
+ }\r
+\r
//\r
// Allocate and map source data buffer for bus master access.\r
//\r
- DataPtr = AllocatePool (DataLength);\r
+ DataPtr = UsbHcAllocateMem (Uhc->MemPool, DataLength);\r
\r
if (DataPtr == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
- OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
-\r
- //\r
- // Map the user data then create a queue head and\r
- // list of TD for it.\r
- //\r
- Status = UhciMapUserData (\r
- Uhc,\r
- EfiUsbDataIn,\r
- DataPtr,\r
- &DataLength,\r
- &PktId,\r
- &DataPhy,\r
- &DataMap\r
- );\r
+ DataPhy = (UINT8 *)(UINTN)UsbHcGetPciAddressForHostMem (Uhc->MemPool, DataPtr, DataLength);\r
\r
- if (EFI_ERROR (Status)) {\r
- goto FREE_DATA;\r
- }\r
+ OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
\r
Qh = UhciCreateQh (Uhc, PollingInterval);\r
\r
if (Qh == NULL) {\r
Status = EFI_OUT_OF_RESOURCES;\r
- goto UNMAP_DATA;\r
+ goto FREE_DATA;\r
}\r
\r
IntTds = UhciCreateBulkOrIntTds (\r
DeviceAddress,\r
EndPointAddress,\r
PktId,\r
+ DataPtr,\r
DataPhy,\r
DataLength,\r
DataToggle,\r
- (UINT8) MaximumPacketLength,\r
+ (UINT8)MaximumPacketLength,\r
IsSlowDevice\r
);\r
\r
goto DESTORY_QH;\r
}\r
\r
- UhciLinkTdToQh (Qh, IntTds);\r
+ UhciLinkTdToQh (Uhc, Qh, IntTds);\r
\r
//\r
// Save QH-TD structures to async Interrupt transfer list,\r
EndPointAddress,\r
DataLength,\r
PollingInterval,\r
- DataMap,\r
DataPtr,\r
CallBackFunction,\r
Context,\r
goto DESTORY_QH;\r
}\r
\r
- UhciLinkQhToFrameList (Uhc->FrameBase, Qh);\r
+ UhciLinkQhToFrameList (Uhc, Qh);\r
\r
gBS->RestoreTPL (OldTpl);\r
return EFI_SUCCESS;\r
DESTORY_QH:\r
UsbHcFreeMem (Uhc->MemPool, Qh, sizeof (UHCI_QH_SW));\r
\r
-UNMAP_DATA:\r
- Uhc->PciIo->Unmap (Uhc->PciIo, DataMap);\r
-\r
FREE_DATA:\r
- gBS->FreePool (DataPtr);\r
+ UsbHcFreeMem (Uhc->MemPool, DataPtr, DataLength);\r
Uhc->PciIo->Flush (Uhc->PciIo);\r
\r
gBS->RestoreTPL (OldTpl);\r
EFI_STATUS\r
EFIAPI\r
Uhci2SyncInterruptTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN OUT VOID *Data,\r
- IN OUT UINTN *DataLength,\r
- IN OUT UINT8 *DataToggle,\r
- IN UINTN TimeOut,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 DeviceAddress,\r
+ IN UINT8 EndPointAddress,\r
+ IN UINT8 DeviceSpeed,\r
+ IN UINTN MaximumPacketLength,\r
+ IN OUT VOID *Data,\r
+ IN OUT UINTN *DataLength,\r
+ IN OUT UINT8 *DataToggle,\r
+ IN UINTN TimeOut,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
+ OUT UINT32 *TransferResult\r
)\r
{\r
- EFI_STATUS Status;\r
- USB_HC_DEV *Uhc;\r
- UHCI_TD_SW *TDs;\r
- UHCI_QH_RESULT QhResult;\r
- EFI_TPL OldTpl;\r
- UINT8 *DataPhy;\r
- VOID *DataMap;\r
- UINT8 PktId;\r
- BOOLEAN IsSlowDevice;\r
+ EFI_STATUS Status;\r
+ USB_HC_DEV *Uhc;\r
+ UHCI_TD_SW *TDs;\r
+ UHCI_QH_RESULT QhResult;\r
+ EFI_TPL OldTpl;\r
+ UINT8 *DataPhy;\r
+ VOID *DataMap;\r
+ UINT8 PktId;\r
+ BOOLEAN IsSlowDevice;\r
\r
Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
DataPhy = NULL;\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- IsSlowDevice = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
+ IsSlowDevice = (BOOLEAN)((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
\r
if ((DataLength == NULL) || (Data == NULL) || (TransferResult == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if ((EndPointAddress & 0x80) == 0) {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
-\r
if ((*DataToggle != 1) && (*DataToggle != 0)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
*TransferResult = EFI_USB_ERR_SYSTEM;\r
Status = EFI_DEVICE_ERROR;\r
\r
-\r
UhciAckAllInterrupt (Uhc);\r
\r
if (!UhciIsHcWorking (Uhc->PciIo)) {\r
DeviceAddress,\r
EndPointAddress,\r
PktId,\r
+ (UINT8 *)Data,\r
DataPhy,\r
*DataLength,\r
DataToggle,\r
- (UINT8) MaximumPacketLength,\r
+ (UINT8)MaximumPacketLength,\r
IsSlowDevice\r
);\r
\r
goto ON_EXIT;\r
}\r
\r
-\r
- UhciLinkTdToQh (Uhc->SyncIntQh, TDs);\r
+ UhciLinkTdToQh (Uhc, Uhc->SyncIntQh, TDs);\r
\r
Status = UhciExecuteTransfer (Uhc, Uhc->SyncIntQh, TDs, TimeOut, IsSlowDevice, &QhResult);\r
\r
return Status;\r
}\r
\r
-\r
/**\r
Submits isochronous transfer to a target USB device according to UEFI 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
Uhci2IsochronousTransfer (\r
- IN EFI_USB2_HC_PROTOCOL *This,\r
- IN UINT8 DeviceAddress,\r
- IN UINT8 EndPointAddress,\r
- IN UINT8 DeviceSpeed,\r
- IN UINTN MaximumPacketLength,\r
- IN UINT8 DataBuffersNumber,\r
- IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],\r
- IN UINTN DataLength,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
- OUT UINT32 *TransferResult\r
+ IN EFI_USB2_HC_PROTOCOL *This,\r
+ IN UINT8 DeviceAddress,\r
+ IN UINT8 EndPointAddress,\r
+ IN UINT8 DeviceSpeed,\r
+ IN UINTN MaximumPacketLength,\r
+ IN UINT8 DataBuffersNumber,\r
+ IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],\r
+ IN UINTN DataLength,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
+ OUT UINT32 *TransferResult\r
)\r
{\r
return EFI_UNSUPPORTED;\r
}\r
\r
-\r
/**\r
Submits Async isochronous transfer to a target USB device according to UEFI 2.0 spec.\r
\r
EFI_STATUS\r
EFIAPI\r
UhciDriverEntryPoint (\r
- IN EFI_HANDLE ImageHandle,\r
- IN EFI_SYSTEM_TABLE *SystemTable\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
return EfiLibInstallDriverBindingComponentName2 (\r
);\r
}\r
\r
-\r
/**\r
Test to see if this driver supports ControllerHandle. Any\r
ControllerHandle that has UsbHcProtocol installed will be supported.\r
EFI_STATUS\r
EFIAPI\r
UhciDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
)\r
{\r
- EFI_STATUS OpenStatus;\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- USB_CLASSC UsbClassCReg;\r
+ EFI_STATUS OpenStatus;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ USB_CLASSC UsbClassCReg;\r
\r
//\r
// Test whether there is PCI IO Protocol attached on the controller handle.\r
OpenStatus = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
+ (VOID **)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
Status = PciIo->Pci.Read (\r
PciIo,\r
EfiPciIoWidthUint8,\r
- CLASSC_OFFSET,\r
+ PCI_CLASSCODE_OFFSET,\r
sizeof (USB_CLASSC) / sizeof (UINT8),\r
&UsbClassCReg\r
);\r
//\r
if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||\r
(UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||\r
- (UsbClassCReg.PI != PCI_CLASSC_PI_UHCI)\r
- ) {\r
-\r
+ (UsbClassCReg.ProgInterface != PCI_IF_UHCI)\r
+ )\r
+ {\r
Status = EFI_UNSUPPORTED;\r
}\r
\r
);\r
\r
return Status;\r
-\r
}\r
\r
-\r
/**\r
Allocate and initialize the empty UHCI device.\r
\r
@param PciIo The PCIIO to use.\r
+ @param DevicePath The device path of host controller.\r
@param OriginalPciAttributes The original PCI attributes.\r
\r
@return Allocated UHCI device. If err, return NULL.\r
**/\r
USB_HC_DEV *\r
UhciAllocateDev (\r
- IN EFI_PCI_IO_PROTOCOL *PciIo,\r
- IN UINT64 OriginalPciAttributes\r
+ IN EFI_PCI_IO_PROTOCOL *PciIo,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r
+ IN UINT64 OriginalPciAttributes\r
)\r
{\r
USB_HC_DEV *Uhc;\r
// This driver supports both USB_HC_PROTOCOL and USB2_HC_PROTOCOL.\r
// USB_HC_PROTOCOL is for EFI 1.1 backward compability.\r
//\r
- Uhc->Signature = USB_HC_DEV_SIGNATURE;\r
- Uhc->Usb2Hc.GetCapability = Uhci2GetCapability;\r
- Uhc->Usb2Hc.Reset = Uhci2Reset;\r
- Uhc->Usb2Hc.GetState = Uhci2GetState;\r
- Uhc->Usb2Hc.SetState = Uhci2SetState;\r
- Uhc->Usb2Hc.ControlTransfer = Uhci2ControlTransfer;\r
- Uhc->Usb2Hc.BulkTransfer = Uhci2BulkTransfer;\r
- Uhc->Usb2Hc.AsyncInterruptTransfer = Uhci2AsyncInterruptTransfer;\r
- Uhc->Usb2Hc.SyncInterruptTransfer = Uhci2SyncInterruptTransfer;\r
- Uhc->Usb2Hc.IsochronousTransfer = Uhci2IsochronousTransfer;\r
- Uhc->Usb2Hc.AsyncIsochronousTransfer = Uhci2AsyncIsochronousTransfer;\r
- Uhc->Usb2Hc.GetRootHubPortStatus = Uhci2GetRootHubPortStatus;\r
- Uhc->Usb2Hc.SetRootHubPortFeature = Uhci2SetRootHubPortFeature;\r
- Uhc->Usb2Hc.ClearRootHubPortFeature = Uhci2ClearRootHubPortFeature;\r
- Uhc->Usb2Hc.MajorRevision = 0x1;\r
- Uhc->Usb2Hc.MinorRevision = 0x1;\r
+ Uhc->Signature = USB_HC_DEV_SIGNATURE;\r
+ Uhc->Usb2Hc.GetCapability = Uhci2GetCapability;\r
+ Uhc->Usb2Hc.Reset = Uhci2Reset;\r
+ Uhc->Usb2Hc.GetState = Uhci2GetState;\r
+ Uhc->Usb2Hc.SetState = Uhci2SetState;\r
+ Uhc->Usb2Hc.ControlTransfer = Uhci2ControlTransfer;\r
+ Uhc->Usb2Hc.BulkTransfer = Uhci2BulkTransfer;\r
+ Uhc->Usb2Hc.AsyncInterruptTransfer = Uhci2AsyncInterruptTransfer;\r
+ Uhc->Usb2Hc.SyncInterruptTransfer = Uhci2SyncInterruptTransfer;\r
+ Uhc->Usb2Hc.IsochronousTransfer = Uhci2IsochronousTransfer;\r
+ Uhc->Usb2Hc.AsyncIsochronousTransfer = Uhci2AsyncIsochronousTransfer;\r
+ Uhc->Usb2Hc.GetRootHubPortStatus = Uhci2GetRootHubPortStatus;\r
+ Uhc->Usb2Hc.SetRootHubPortFeature = Uhci2SetRootHubPortFeature;\r
+ Uhc->Usb2Hc.ClearRootHubPortFeature = Uhci2ClearRootHubPortFeature;\r
+ Uhc->Usb2Hc.MajorRevision = 0x1;\r
+ Uhc->Usb2Hc.MinorRevision = 0x1;\r
\r
Uhc->PciIo = PciIo;\r
+ Uhc->DevicePath = DevicePath;\r
Uhc->OriginalPciAttributes = OriginalPciAttributes;\r
Uhc->MemPool = UsbHcInitMemPool (PciIo, TRUE, 0);\r
\r
\r
Status = gBS->CreateEvent (\r
EVT_TIMER | EVT_NOTIFY_SIGNAL,\r
- TPL_CALLBACK,\r
+ TPL_NOTIFY,\r
UhciMonitorAsyncReqList,\r
Uhc,\r
&Uhc->AsyncIntMonitor\r
return NULL;\r
}\r
\r
-\r
/**\r
Free the UHCI device and release its associated resources.\r
\r
@param Uhc The UHCI device to release.\r
\r
- @return None.\r
-\r
**/\r
VOID\r
UhciFreeDev (\r
- IN USB_HC_DEV *Uhc\r
+ IN USB_HC_DEV *Uhc\r
)\r
{\r
if (Uhc->AsyncIntMonitor != NULL) {\r
gBS->CloseEvent (Uhc->AsyncIntMonitor);\r
}\r
\r
+ if (Uhc->ExitBootServiceEvent != NULL) {\r
+ gBS->CloseEvent (Uhc->ExitBootServiceEvent);\r
+ }\r
+\r
if (Uhc->MemPool != NULL) {\r
UsbHcFreeMemPool (Uhc->MemPool);\r
}\r
FreePool (Uhc);\r
}\r
\r
-\r
/**\r
Uninstall all Uhci Interface.\r
\r
@param Controller Controller handle.\r
@param This Protocol instance pointer.\r
\r
- @return None.\r
-\r
**/\r
VOID\r
UhciCleanDevUp (\r
- IN EFI_HANDLE Controller,\r
- IN EFI_USB2_HC_PROTOCOL *This\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_USB2_HC_PROTOCOL *This\r
)\r
{\r
- USB_HC_DEV *Uhc;\r
+ USB_HC_DEV *Uhc;\r
+ EFI_STATUS Status;\r
\r
//\r
// Uninstall the USB_HC and USB_HC2 protocol, then disable the controller\r
//\r
Uhc = UHC_FROM_USB2_HC_PROTO (This);\r
- UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
\r
- gBS->UninstallProtocolInterface (\r
- Controller,\r
- &gEfiUsb2HcProtocolGuid,\r
- &Uhc->Usb2Hc\r
- );\r
+ Status = gBS->UninstallProtocolInterface (\r
+ Controller,\r
+ &gEfiUsb2HcProtocolGuid,\r
+ &Uhc->Usb2Hc\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return;\r
+ }\r
\r
+ UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
UhciFreeAllAsyncReq (Uhc);\r
UhciDestoryFrameList (Uhc);\r
\r
// Restore original PCI attributes\r
//\r
Uhc->PciIo->Attributes (\r
- Uhc->PciIo,\r
- EfiPciIoAttributeOperationSet,\r
- Uhc->OriginalPciAttributes,\r
- NULL\r
- );\r
+ Uhc->PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ Uhc->OriginalPciAttributes,\r
+ NULL\r
+ );\r
\r
UhciFreeDev (Uhc);\r
}\r
\r
+/**\r
+ One notified function to stop the Host Controller when gBS->ExitBootServices() called.\r
+\r
+ @param Event Pointer to this event\r
+ @param Context Event handler private data\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+UhcExitBootService (\r
+ EFI_EVENT Event,\r
+ VOID *Context\r
+ )\r
+{\r
+ USB_HC_DEV *Uhc;\r
+\r
+ Uhc = (USB_HC_DEV *)Context;\r
+\r
+ //\r
+ // Stop the Host Controller\r
+ //\r
+ UhciStopHc (Uhc, UHC_GENERIC_TIMEOUT);\r
+\r
+ //\r
+ // Reset the Host Controller\r
+ //\r
+ UhciSetRegBit (Uhc->PciIo, USBCMD_OFFSET, USBCMD_HCRESET);\r
+ gBS->Stall (UHC_ROOT_PORT_RECOVERY_STALL);\r
+}\r
\r
/**\r
Starting the Usb UHCI Driver.\r
EFI_STATUS\r
EFIAPI\r
UhciDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- USB_HC_DEV *Uhc;\r
- UINT64 Supports;\r
- UINT64 OriginalPciAttributes;\r
- BOOLEAN PciAttributesSaved;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ USB_HC_DEV *Uhc;\r
+ UINT64 Supports;\r
+ UINT64 OriginalPciAttributes;\r
+ BOOLEAN PciAttributesSaved;\r
+ EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;\r
\r
//\r
// Open PCIIO, then enable the EHC device and turn off emulation\r
//\r
- Uhc = NULL;\r
+ Uhc = NULL;\r
Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiPciIoProtocolGuid,\r
- (VOID **) &PciIo,\r
+ (VOID **)&PciIo,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_BY_DRIVER\r
return Status;\r
}\r
\r
+ //\r
+ // Open Device Path Protocol for on USB host controller\r
+ //\r
+ HcDevicePath = NULL;\r
+ Status = gBS->OpenProtocol (\r
+ Controller,\r
+ &gEfiDevicePathProtocolGuid,\r
+ (VOID **)&HcDevicePath,\r
+ This->DriverBindingHandle,\r
+ Controller,\r
+ EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
+ );\r
+\r
PciAttributesSaved = FALSE;\r
//\r
// Save original PCI attributes\r
if (EFI_ERROR (Status)) {\r
goto CLOSE_PCIIO;\r
}\r
+\r
PciAttributesSaved = TRUE;\r
\r
//\r
&Supports\r
);\r
if (!EFI_ERROR (Status)) {\r
- Supports &= EFI_PCI_DEVICE_ENABLE;\r
- Status = PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationEnable,\r
- Supports,\r
- NULL\r
- );\r
+ Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;\r
+ Status = PciIo->Attributes (\r
+ PciIo,\r
+ EfiPciIoAttributeOperationEnable,\r
+ Supports,\r
+ NULL\r
+ );\r
}\r
\r
if (EFI_ERROR (Status)) {\r
goto CLOSE_PCIIO;\r
}\r
\r
- Uhc = UhciAllocateDev (PciIo, OriginalPciAttributes);\r
+ Uhc = UhciAllocateDev (PciIo, HcDevicePath, OriginalPciAttributes);\r
\r
if (Uhc == NULL) {\r
Status = EFI_OUT_OF_RESOURCES;\r
goto FREE_UHC;\r
}\r
\r
+ //\r
+ // Create event to stop the HC when exit boot service.\r
+ //\r
+ Status = gBS->CreateEventEx (\r
+ EVT_NOTIFY_SIGNAL,\r
+ TPL_NOTIFY,\r
+ UhcExitBootService,\r
+ Uhc,\r
+ &gEfiEventExitBootServicesGuid,\r
+ &Uhc->ExitBootServiceEvent\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ goto UNINSTALL_USBHC;\r
+ }\r
+\r
//\r
// Install the component name protocol\r
//\r
FALSE\r
);\r
\r
-\r
//\r
// Start the UHCI hardware, also set its reclamation point to 64 bytes\r
//\r
\r
return EFI_SUCCESS;\r
\r
+UNINSTALL_USBHC:\r
+ gBS->UninstallMultipleProtocolInterfaces (\r
+ Controller,\r
+ &gEfiUsb2HcProtocolGuid,\r
+ &Uhc->Usb2Hc,\r
+ NULL\r
+ );\r
+\r
FREE_UHC:\r
UhciFreeDev (Uhc);\r
\r
// Restore original PCI attributes\r
//\r
PciIo->Attributes (\r
- PciIo,\r
- EfiPciIoAttributeOperationSet,\r
- OriginalPciAttributes,\r
- NULL\r
- );\r
+ PciIo,\r
+ EfiPciIoAttributeOperationSet,\r
+ OriginalPciAttributes,\r
+ NULL\r
+ );\r
}\r
\r
gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Controller\r
- );\r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
+ Controller\r
+ );\r
\r
return Status;\r
}\r
\r
-\r
/**\r
- Stop this driver on ControllerHandle. Support stoping any child handles\r
+ Stop this driver on ControllerHandle. Support stopping any child handles\r
created by this driver.\r
\r
@param This Protocol instance pointer.\r
EFI_STATUS\r
EFIAPI\r
UhciDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN UINTN NumberOfChildren,\r
+ IN EFI_HANDLE *ChildHandleBuffer\r
)\r
{\r
EFI_USB2_HC_PROTOCOL *Usb2Hc;\r
EFI_STATUS Status;\r
\r
- Status = gBS->OpenProtocol (\r
+ Status = gBS->OpenProtocol (\r
Controller,\r
&gEfiUsb2HcProtocolGuid,\r
- (VOID **) &Usb2Hc,\r
+ (VOID **)&Usb2Hc,\r
This->DriverBindingHandle,\r
Controller,\r
EFI_OPEN_PROTOCOL_GET_PROTOCOL\r
UhciCleanDevUp (Controller, Usb2Hc);\r
\r
gBS->CloseProtocol (\r
- Controller,\r
- &gEfiPciIoProtocolGuid,\r
- This->DriverBindingHandle,\r
- Controller\r
- );\r
+ Controller,\r
+ &gEfiPciIoProtocolGuid,\r
+ This->DriverBindingHandle,\r
+ Controller\r
+ );\r
\r
return EFI_SUCCESS;\r
}\r
-\r
projects / mirror_edk2.git / blobdiff