Fix compile break on IA32 arch.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / Uhci.c

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
index 4bac309cc1fae1d039f1ac4d321342cd21da2f2e..61a8fb202388704f5786b5cae24c00d0d4147c8b 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.c
@@ -2,7 +2,7 @@
 \r
   The UHCI driver model and HC protocol routines.\r
 \r
-Copyright (c) 2004 - 2009, Intel Corporation\r
+Copyright (c) 2004 - 2010, Intel Corporation\r
 All rights reserved. This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -707,7 +707,9 @@ Uhci2ControlTransfer (
           Uhc,\r
           DeviceAddress,\r
           PktId,\r
+          (UINT8*)Request,\r
           RequestPhy,\r
+          (UINT8*)Data,\r
           DataPhy,\r
           TransferDataLength,\r
           (UINT8) MaximumPacketLength,\r
@@ -724,7 +726,7 @@ Uhci2ControlTransfer (
   // the TD to corrosponding queue head, then check\r
   // the execution result\r
   //\r
-  UhciLinkTdToQh (Uhc->CtrlQh, TDs);\r
+  UhciLinkTdToQh (Uhc, Uhc->CtrlQh, TDs);\r
   Status = UhciExecuteTransfer (Uhc, Uhc->CtrlQh, TDs, TimeOut, IsSlowDevice, &QhResult);\r
   UhciUnlinkTdFromQh (Uhc->CtrlQh, TDs);\r
 \r
@@ -858,6 +860,7 @@ Uhci2BulkTransfer (
              DeviceAddress,\r
              EndPointAddress,\r
              PktId,\r
+             (UINT8 *)*Data,\r
              DataPhy,\r
              *DataLength,\r
              DataToggle,\r
@@ -878,7 +881,7 @@ Uhci2BulkTransfer (
   //\r
   BulkQh = Uhc->BulkQh;\r
 \r
-  UhciLinkTdToQh (BulkQh, TDs);\r
+  UhciLinkTdToQh (Uhc, BulkQh, TDs);\r
   Status = UhciExecuteTransfer (Uhc, BulkQh, TDs, TimeOut, FALSE, &QhResult);\r
   UhciUnlinkTdFromQh (BulkQh, TDs);\r
 \r
@@ -946,7 +949,6 @@ Uhci2AsyncInterruptTransfer (
   EFI_STATUS          Status;\r
   UINT8               *DataPtr;\r
   UINT8               *DataPhy;\r
-  VOID                *DataMap;\r
   UINT8               PktId;\r
 \r
   Uhc       = UHC_FROM_USB2_HC_PROTO (This);\r
@@ -954,7 +956,6 @@ Uhci2AsyncInterruptTransfer (
   IntTds    = NULL;\r
   DataPtr   = NULL;\r
   DataPhy   = NULL;\r
-  DataMap   = NULL;\r
 \r
   IsSlowDevice  = (BOOLEAN) ((EFI_USB_SPEED_LOW == DeviceSpeed) ? TRUE : FALSE);\r
 \r
@@ -995,40 +996,30 @@ Uhci2AsyncInterruptTransfer (
     return EFI_DEVICE_ERROR;\r
   }\r
 \r
+  if ((EndPointAddress & 0x80) == 0) {\r
+    PktId = OUTPUT_PACKET_ID;\r
+  } else {\r
+    PktId = INPUT_PACKET_ID;\r
+  }\r
+\r
   //\r
   // Allocate and map source data buffer for bus master access.\r
   //\r
-  DataPtr = AllocatePool (DataLength);\r
+  DataPtr = UsbHcAllocateMem (Uhc->MemPool, DataLength);\r
 \r
   if (DataPtr == NULL) {\r
     return EFI_OUT_OF_RESOURCES;\r
   }\r
 \r
-  OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
+  DataPhy = (UINT8 *) (UINTN) UsbHcGetPciAddressForHostMem (Uhc->MemPool, DataPtr, DataLength);\r
 \r
-  //\r
-  // Map the user data then create a queue head and\r
-  // list of TD for it.\r
-  //\r
-  Status = UhciMapUserData (\r
-             Uhc,\r
-             EfiUsbDataIn,\r
-             DataPtr,\r
-             &DataLength,\r
-             &PktId,\r
-             &DataPhy,\r
-             &DataMap\r
-             );\r
-\r
-  if (EFI_ERROR (Status)) {\r
-    goto FREE_DATA;\r
-  }\r
+  OldTpl = gBS->RaiseTPL (UHCI_TPL);\r
 \r
   Qh = UhciCreateQh (Uhc, PollingInterval);\r
 \r
   if (Qh == NULL) {\r
     Status = EFI_OUT_OF_RESOURCES;\r
-    goto UNMAP_DATA;\r
+    goto FREE_DATA;\r
   }\r
 \r
   IntTds = UhciCreateBulkOrIntTds (\r
@@ -1036,6 +1027,7 @@ Uhci2AsyncInterruptTransfer (
              DeviceAddress,\r
              EndPointAddress,\r
              PktId,\r
+             DataPtr,\r
              DataPhy,\r
              DataLength,\r
              DataToggle,\r
@@ -1048,7 +1040,7 @@ Uhci2AsyncInterruptTransfer (
     goto DESTORY_QH;\r
   }\r
 \r
-  UhciLinkTdToQh (Qh, IntTds);\r
+  UhciLinkTdToQh (Uhc, Qh, IntTds);\r
 \r
   //\r
   // Save QH-TD structures to async Interrupt transfer list,\r
@@ -1062,7 +1054,6 @@ Uhci2AsyncInterruptTransfer (
              EndPointAddress,\r
              DataLength,\r
              PollingInterval,\r
-             DataMap,\r
              DataPtr,\r
              CallBackFunction,\r
              Context,\r
@@ -1073,7 +1064,7 @@ Uhci2AsyncInterruptTransfer (
     goto DESTORY_QH;\r
   }\r
 \r
-  UhciLinkQhToFrameList (Uhc->FrameBase, Qh);\r
+  UhciLinkQhToFrameList (Uhc, Qh);\r
 \r
   gBS->RestoreTPL (OldTpl);\r
   return EFI_SUCCESS;\r
@@ -1081,11 +1072,8 @@ Uhci2AsyncInterruptTransfer (
 DESTORY_QH:\r
   UsbHcFreeMem (Uhc->MemPool, Qh, sizeof (UHCI_QH_SW));\r
 \r
-UNMAP_DATA:\r
-  Uhc->PciIo->Unmap (Uhc->PciIo, DataMap);\r
-\r
 FREE_DATA:\r
-  gBS->FreePool (DataPtr);\r
+  UsbHcFreeMem (Uhc->MemPool, DataPtr, DataLength);\r
   Uhc->PciIo->Flush (Uhc->PciIo);\r
 \r
   gBS->RestoreTPL (OldTpl);\r
@@ -1209,6 +1197,7 @@ Uhci2SyncInterruptTransfer (
           DeviceAddress,\r
           EndPointAddress,\r
           PktId,\r
+          (UINT8 *)Data,\r
           DataPhy,\r
           *DataLength,\r
           DataToggle,\r
@@ -1224,7 +1213,7 @@ Uhci2SyncInterruptTransfer (
   }\r
 \r
 \r
-  UhciLinkTdToQh (Uhc->SyncIntQh, TDs);\r
+  UhciLinkTdToQh (Uhc, Uhc->SyncIntQh, TDs);\r
 \r
   Status = UhciExecuteTransfer (Uhc, Uhc->SyncIntQh, TDs, TimeOut, IsSlowDevice, &QhResult);\r
 \r
@@ -1406,7 +1395,7 @@ UhciDriverBindingSupported (
   //\r
   if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||\r
       (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||\r
-      (UsbClassCReg.PI != PCI_IF_UHCI)\r
+      (UsbClassCReg.ProgInterface != PCI_IF_UHCI)\r
       ) {\r
 \r
     Status = EFI_UNSUPPORTED;\r