MdeModulePkg: Apply uncrustify changes

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / Uhci.h

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
index 882f5e55ea1c46d8dbf1ccff220e79df6662bb9a..138623ed6bb1b728dd16e4ab33b7519508ec48b4 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/Uhci.h
@@ -10,7 +10,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #ifndef _EFI_UHCI_H_\r
 #define _EFI_UHCI_H_\r
 \r
-\r
 #include <Uefi.h>\r
 \r
 #include <Protocol/Usb2HostController.h>\r
@@ -31,7 +30,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 \r
 #include <IndustryStandard/Pci.h>\r
 \r
-typedef struct _USB_HC_DEV  USB_HC_DEV;\r
+typedef struct _USB_HC_DEV USB_HC_DEV;\r
 \r
 #include "UsbHcMem.h"\r
 #include "UhciQueue.h"\r
@@ -44,20 +43,20 @@ typedef struct _USB_HC_DEV  USB_HC_DEV;
 // UHC timeout experience values\r
 //\r
 \r
-#define UHC_1_MICROSECOND             1\r
-#define UHC_1_MILLISECOND             (1000 * UHC_1_MICROSECOND)\r
-#define UHC_1_SECOND                  (1000 * UHC_1_MILLISECOND)\r
+#define UHC_1_MICROSECOND  1\r
+#define UHC_1_MILLISECOND  (1000 * UHC_1_MICROSECOND)\r
+#define UHC_1_SECOND       (1000 * UHC_1_MILLISECOND)\r
 \r
 //\r
 // UHCI register operation timeout, set by experience\r
 //\r
-#define UHC_GENERIC_TIMEOUT           UHC_1_SECOND\r
+#define UHC_GENERIC_TIMEOUT  UHC_1_SECOND\r
 \r
 //\r
 // Wait for force global resume(FGR) complete, refers to\r
 // specification[UHCI11-2.1.1]\r
 //\r
-#define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)\r
+#define UHC_FORCE_GLOBAL_RESUME_STALL  (20 * UHC_1_MILLISECOND)\r
 \r
 //\r
 // Wait for roothub port reset and recovery, reset stall\r
@@ -71,22 +70,22 @@ typedef struct _USB_HC_DEV  USB_HC_DEV;
 // Sync and Async transfer polling interval, set by experience,\r
 // and the unit of Async is 100us.\r
 //\r
-#define UHC_SYNC_POLL_INTERVAL        (1 * UHC_1_MILLISECOND)\r
-#define UHC_ASYNC_POLL_INTERVAL       EFI_TIMER_PERIOD_MILLISECONDS(1)\r
+#define UHC_SYNC_POLL_INTERVAL   (1 * UHC_1_MILLISECOND)\r
+#define UHC_ASYNC_POLL_INTERVAL  EFI_TIMER_PERIOD_MILLISECONDS(1)\r
 \r
 //\r
 // UHC raises TPL to TPL_NOTIFY to serialize all its operations\r
 // to protect shared data structures.\r
 //\r
-#define  UHCI_TPL                     TPL_NOTIFY\r
+#define  UHCI_TPL  TPL_NOTIFY\r
 \r
-#define  USB_HC_DEV_SIGNATURE         SIGNATURE_32 ('u', 'h', 'c', 'i')\r
+#define  USB_HC_DEV_SIGNATURE  SIGNATURE_32 ('u', 'h', 'c', 'i')\r
 \r
 #pragma pack(1)\r
 typedef struct {\r
-  UINT8               ProgInterface;\r
-  UINT8               SubClassCode;\r
-  UINT8               BaseCode;\r
+  UINT8    ProgInterface;\r
+  UINT8    SubClassCode;\r
+  UINT8    BaseCode;\r
 } USB_CLASSC;\r
 #pragma pack()\r
 \r
@@ -104,20 +103,20 @@ typedef struct {
 // device requires this bandwidth reclamation capability.\r
 //\r
 struct _USB_HC_DEV {\r
-  UINT32                    Signature;\r
-  EFI_USB2_HC_PROTOCOL      Usb2Hc;\r
-  EFI_PCI_IO_PROTOCOL       *PciIo;\r
-  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;\r
-  UINT64                    OriginalPciAttributes;\r
+  UINT32                      Signature;\r
+  EFI_USB2_HC_PROTOCOL        Usb2Hc;\r
+  EFI_PCI_IO_PROTOCOL         *PciIo;\r
+  EFI_DEVICE_PATH_PROTOCOL    *DevicePath;\r
+  UINT64                      OriginalPciAttributes;\r
 \r
   //\r
   // Schedule data structures\r
   //\r
-  UINT32                    *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r
-  UINT32                    *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r
-  UHCI_QH_SW                *SyncIntQh;\r
-  UHCI_QH_SW                *CtrlQh;\r
-  UHCI_QH_SW                *BulkQh;\r
+  UINT32                      *FrameBase;         // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r
+  UINT32                      *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r
+  UHCI_QH_SW                  *SyncIntQh;\r
+  UHCI_QH_SW                  *CtrlQh;\r
+  UHCI_QH_SW                  *BulkQh;\r
 \r
   //\r
   // Structures to maintain asynchronus interrupt transfers.\r
@@ -127,22 +126,21 @@ struct _USB_HC_DEV {
   // released in two steps using Recycle and RecycleWait.\r
   // Check the asynchronous interrupt management routines.\r
   //\r
-  LIST_ENTRY                AsyncIntList;\r
-  EFI_EVENT                 AsyncIntMonitor;\r
-  UHCI_ASYNC_REQUEST        *Recycle;\r
-  UHCI_ASYNC_REQUEST        *RecycleWait;\r
-\r
+  LIST_ENTRY                  AsyncIntList;\r
+  EFI_EVENT                   AsyncIntMonitor;\r
+  UHCI_ASYNC_REQUEST          *Recycle;\r
+  UHCI_ASYNC_REQUEST          *RecycleWait;\r
 \r
-  UINTN                     RootPorts;\r
-  USBHC_MEM_POOL            *MemPool;\r
-  EFI_UNICODE_STRING_TABLE  *CtrlNameTable;\r
-  VOID                      *FrameMapping;\r
+  UINTN                       RootPorts;\r
+  USBHC_MEM_POOL              *MemPool;\r
+  EFI_UNICODE_STRING_TABLE    *CtrlNameTable;\r
+  VOID                        *FrameMapping;\r
 \r
   //\r
   // ExitBootServicesEvent is used to stop the EHC DMA operation\r
   // after exit boot service.\r
   //\r
-  EFI_EVENT                 ExitBootServiceEvent;\r
+  EFI_EVENT                   ExitBootServiceEvent;\r
 };\r
 \r
 extern EFI_DRIVER_BINDING_PROTOCOL   gUhciDriverBinding;\r
@@ -164,9 +162,9 @@ extern EFI_COMPONENT_NAME2_PROTOCOL  gUhciComponentName2;
 EFI_STATUS\r
 EFIAPI\r
 UhciDriverBindingSupported (\r
-  IN EFI_DRIVER_BINDING_PROTOCOL     *This,\r
-  IN EFI_HANDLE                      Controller,\r
-  IN EFI_DEVICE_PATH_PROTOCOL        *RemainingDevicePath\r
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,\r
+  IN EFI_HANDLE                   Controller,\r
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath\r
   );\r
 \r
 /**\r
@@ -185,9 +183,9 @@ UhciDriverBindingSupported (
 EFI_STATUS\r
 EFIAPI\r
 UhciDriverBindingStart (\r
-  IN EFI_DRIVER_BINDING_PROTOCOL     *This,\r
-  IN EFI_HANDLE                      Controller,\r
-  IN EFI_DEVICE_PATH_PROTOCOL        *RemainingDevicePath\r
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,\r
+  IN EFI_HANDLE                   Controller,\r
+  IN EFI_DEVICE_PATH_PROTOCOL     *RemainingDevicePath\r
   );\r
 \r
 /**\r
@@ -206,10 +204,10 @@ UhciDriverBindingStart (
 EFI_STATUS\r
 EFIAPI\r
 UhciDriverBindingStop (\r
-  IN EFI_DRIVER_BINDING_PROTOCOL     *This,\r
-  IN EFI_HANDLE                      Controller,\r
-  IN UINTN                           NumberOfChildren,\r
-  IN EFI_HANDLE                      *ChildHandleBuffer\r
+  IN EFI_DRIVER_BINDING_PROTOCOL  *This,\r
+  IN EFI_HANDLE                   Controller,\r
+  IN UINTN                        NumberOfChildren,\r
+  IN EFI_HANDLE                   *ChildHandleBuffer\r
   );\r
 \r
 #endif\r