/** @file\r
\r
-Copyright (c) 2007, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-Module Name:\r
-\r
- UhciReg.c\r
-\r
-Abstract:\r
-\r
The UHCI register operation routines.\r
\r
-Revision History\r
-\r
+Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
\r
/**\r
- Read a UHCI register\r
+ Read a UHCI register.\r
\r
- @param PciIo The EFI_PCI_IO_PROTOCOL to use\r
- @param Offset Register offset to USB_BAR_INDEX\r
+ @param PciIo The EFI_PCI_IO_PROTOCOL to use.\r
+ @param Offset Register offset to USB_BAR_INDEX.\r
\r
- @return Content of register\r
+ @return Content of register.\r
\r
**/\r
UINT16\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- UHCI_ERROR (("UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset));\r
+ DEBUG ((EFI_D_ERROR, "UhciReadReg: PciIo Io.Read error: %r at offset %d\n", Status, Offset));\r
\r
Data = 0xFFFF;\r
}\r
\r
\r
/**\r
- Write data to UHCI register\r
-\r
- @param PciIo The EFI_PCI_IO_PROTOCOL to use\r
- @param Offset Register offset to USB_BAR_INDEX\r
- @param Data Data to write\r
+ Write data to UHCI register.\r
\r
- @return VOID\r
+ @param PciIo The EFI_PCI_IO_PROTOCOL to use.\r
+ @param Offset Register offset to USB_BAR_INDEX.\r
+ @param Data Data to write.\r
\r
**/\r
VOID\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- UHCI_ERROR (("UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset));\r
+ DEBUG ((EFI_D_ERROR, "UhciWriteReg: PciIo Io.Write error: %r at offset %d\n", Status, Offset));\r
}\r
}\r
\r
\r
/**\r
- Set a bit of the UHCI Register\r
+ Set a bit of the UHCI Register.\r
\r
- @param PciIo The EFI_PCI_IO_PROTOCOL to use\r
- @param Offset Register offset to USB_BAR_INDEX\r
- @param Bit The bit to set\r
-\r
- @return None\r
+ @param PciIo The EFI_PCI_IO_PROTOCOL to use.\r
+ @param Offset Register offset to USB_BAR_INDEX.\r
+ @param Bit The bit to set.\r
\r
**/\r
VOID\r
\r
\r
/**\r
- Clear a bit of the UHCI Register\r
-\r
- @param PciIo The PCI_IO protocol to access the PCI\r
- @param Offset Register offset to USB_BAR_INDEX\r
- @param Bit The bit to clear\r
+ Clear a bit of the UHCI Register.\r
\r
- @return None\r
+ @param PciIo The PCI_IO protocol to access the PCI.\r
+ @param Offset Register offset to USB_BAR_INDEX.\r
+ @param Bit The bit to clear.\r
\r
**/\r
VOID\r
\r
/**\r
Clear all the interrutp status bits, these bits\r
- are Write-Clean\r
-\r
- @param Uhc The UHCI device\r
+ are Write-Clean.\r
\r
- @return None\r
+ @param Uhc The UHCI device.\r
\r
**/\r
VOID\r
// is a temporary error status.\r
//\r
if (!UhciIsHcWorking (Uhc->PciIo)) {\r
- UHCI_ERROR (("UhciAckAllInterrupt: re-enable the UHCI from system error\n"));\r
- Uhc->UsbHc.SetState (&Uhc->UsbHc, EfiUsbHcStateOperational);\r
+ DEBUG ((EFI_D_ERROR, "UhciAckAllInterrupt: re-enable the UHCI from system error\n"));\r
+ Uhc->Usb2Hc.SetState (&Uhc->Usb2Hc, EfiUsbHcStateOperational);\r
}\r
}\r
\r
\r
-\r
/**\r
- Stop the host controller\r
+ Stop the host controller.\r
\r
- @param Uhc The UHCI device\r
- @param Timeout Max time allowed\r
+ @param Uhc The UHCI device.\r
+ @param Timeout Max time allowed.\r
\r
- @retval EFI_SUCCESS The host controller is stopped\r
- @retval EFI_TIMEOUT Failed to stop the host controller\r
+ @retval EFI_SUCCESS The host controller is stopped.\r
+ @retval EFI_TIMEOUT Failed to stop the host controller.\r
\r
**/\r
EFI_STATUS\r
UhciStopHc (\r
- IN USB_HC_DEV *Uhc,\r
- IN UINTN Timeout\r
+ IN USB_HC_DEV *Uhc,\r
+ IN UINTN Timeout\r
)\r
{\r
UINT16 UsbSts;\r
\r
\r
/**\r
- Check whether the host controller operates well\r
+ Check whether the host controller operates well.\r
\r
- @param PciIo The PCI_IO protocol to use\r
+ @param PciIo The PCI_IO protocol to use.\r
\r
- @retval TRUE Host controller is working\r
- @retval FALSE Host controller is halted or system error\r
+ @retval TRUE Host controller is working.\r
+ @retval FALSE Host controller is halted or system error.\r
\r
**/\r
BOOLEAN\r
\r
UsbSts = UhciReadReg (PciIo, USBSTS_OFFSET);\r
\r
- if (UsbSts & (USBSTS_HCPE | USBSTS_HSE | USBSTS_HCH)) {\r
- UHCI_ERROR (("UhciIsHcWorking: current USB state is %x\n", UsbSts));\r
+ if ((UsbSts & (USBSTS_HCPE | USBSTS_HSE | USBSTS_HCH)) != 0) {\r
+ DEBUG ((EFI_D_ERROR, "UhciIsHcWorking: current USB state is %x\n", UsbSts));\r
return FALSE;\r
}\r
\r
Set the UHCI frame list base address. It can't use\r
UhciWriteReg which access memory in UINT16.\r
\r
- @param PciIo The EFI_PCI_IO_PROTOCOL to use\r
- @param Addr Address to set\r
-\r
- @return VOID\r
+ @param PciIo The EFI_PCI_IO_PROTOCOL to use.\r
+ @param Addr Address to set.\r
\r
**/\r
VOID\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- UHCI_ERROR (("UhciSetFrameListBaseAddr: PciIo Io.Write error: %r\n", Status));\r
+ DEBUG ((EFI_D_ERROR, "UhciSetFrameListBaseAddr: PciIo Io.Write error: %r\n", Status));\r
}\r
}\r
\r
\r
/**\r
- Disable USB Emulation\r
-\r
- @param PciIo The EFI_PCI_IO_PROTOCOL protocol to use\r
+ Disable USB Emulation.\r
\r
- @return VOID\r
+ @param PciIo The EFI_PCI_IO_PROTOCOL protocol to use.\r
\r
**/\r
VOID\r
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