#ifndef _EFI_UHCI_SCHED_H_\r
#define _EFI_UHCI_SCHED_H_\r
\r
-\r
#define UHCI_ASYNC_INT_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'a')\r
//\r
// The failure mask for USB transfer return status. If any of\r
EFI_USB_ERR_TIMEOUT | EFI_USB_ERR_BITSTUFF | \\r
EFI_USB_ERR_SYSTEM)\r
\r
-\r
//\r
// Structure to return the result of UHCI QH execution.\r
// Result is the final result of the QH's QTD. NextToggle\r
// length of data transferred.\r
//\r
typedef struct {\r
- UINT32 Result;\r
- UINT8 NextToggle;\r
- UINTN Complete;\r
+ UINT32 Result;\r
+ UINT8 NextToggle;\r
+ UINTN Complete;\r
} UHCI_QH_RESULT;\r
\r
-typedef struct _UHCI_ASYNC_REQUEST UHCI_ASYNC_REQUEST;\r
+typedef struct _UHCI_ASYNC_REQUEST UHCI_ASYNC_REQUEST;\r
\r
//\r
// Structure used to manager the asynchronous interrupt transfers.\r
//\r
-struct _UHCI_ASYNC_REQUEST{\r
- UINTN Signature;\r
- LIST_ENTRY Link;\r
- UHCI_ASYNC_REQUEST *Recycle;\r
+struct _UHCI_ASYNC_REQUEST {\r
+ UINTN Signature;\r
+ LIST_ENTRY Link;\r
+ UHCI_ASYNC_REQUEST *Recycle;\r
\r
//\r
// Endpoint attributes\r
//\r
- UINT8 DevAddr;\r
- UINT8 EndPoint;\r
- BOOLEAN IsLow;\r
- UINTN Interval;\r
+ UINT8 DevAddr;\r
+ UINT8 EndPoint;\r
+ BOOLEAN IsLow;\r
+ UINTN Interval;\r
\r
//\r
// Data and UHC structures\r
//\r
- UHCI_QH_SW *QhSw;\r
- UHCI_TD_SW *FirstTd;\r
- UINT8 *Data; // Allocated host memory, not mapped memory\r
- UINTN DataLen;\r
- VOID *Mapping;\r
+ UHCI_QH_SW *QhSw;\r
+ UHCI_TD_SW *FirstTd;\r
+ UINT8 *Data; // Allocated host memory, not mapped memory\r
+ UINTN DataLen;\r
+ VOID *Mapping;\r
\r
//\r
// User callback and its context\r
//\r
- EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;\r
- VOID *Context;\r
+ EFI_ASYNC_USB_TRANSFER_CALLBACK Callback;\r
+ VOID *Context;\r
};\r
\r
#define UHCI_ASYNC_INT_FROM_LINK(a) \\r
CR (a, UHCI_ASYNC_REQUEST, Link, UHCI_ASYNC_INT_SIGNATURE)\r
\r
-\r
/**\r
Create Frame List Structure.\r
\r
**/\r
EFI_STATUS\r
UhciInitFrameList (\r
- IN USB_HC_DEV *Uhc\r
+ IN USB_HC_DEV *Uhc\r
);\r
\r
/**\r
**/\r
VOID\r
UhciDestoryFrameList (\r
- IN USB_HC_DEV *Uhc\r
+ IN USB_HC_DEV *Uhc\r
);\r
\r
-\r
/**\r
Convert the poll rate to the maxium 2^n that is smaller\r
than Interval.\r
**/\r
UINTN\r
UhciConvertPollRate (\r
- IN UINTN Interval\r
+ IN UINTN Interval\r
);\r
\r
-\r
/**\r
Link a queue head (for asynchronous interrupt transfer) to\r
the frame list.\r
**/\r
VOID\r
UhciLinkQhToFrameList (\r
- USB_HC_DEV *Uhc,\r
- UHCI_QH_SW *Qh\r
+ USB_HC_DEV *Uhc,\r
+ UHCI_QH_SW *Qh\r
);\r
\r
-\r
/**\r
Unlink QH from the frame list is easier: find all\r
the precedence node, and pointer there next to QhSw's\r
**/\r
VOID\r
UhciUnlinkQhFromFrameList (\r
- USB_HC_DEV *Uhc,\r
- UHCI_QH_SW *Qh\r
+ USB_HC_DEV *Uhc,\r
+ UHCI_QH_SW *Qh\r
);\r
\r
-\r
/**\r
Check the result of the transfer.\r
\r
**/\r
EFI_STATUS\r
UhciExecuteTransfer (\r
- IN USB_HC_DEV *Uhc,\r
- IN UHCI_QH_SW *Qh,\r
- IN UHCI_TD_SW *Td,\r
- IN UINTN TimeOut,\r
- IN BOOLEAN IsLow,\r
- OUT UHCI_QH_RESULT *QhResult\r
+ IN USB_HC_DEV *Uhc,\r
+ IN UHCI_QH_SW *Qh,\r
+ IN UHCI_TD_SW *Td,\r
+ IN UINTN TimeOut,\r
+ IN BOOLEAN IsLow,\r
+ OUT UHCI_QH_RESULT *QhResult\r
);\r
\r
-\r
/**\r
Create Async Request node, and Link to List.\r
\r
IN BOOLEAN IsLow\r
);\r
\r
-\r
/**\r
Delete Async Interrupt QH and TDs.\r
\r
**/\r
EFI_STATUS\r
UhciRemoveAsyncReq (\r
- IN USB_HC_DEV *Uhc,\r
- IN UINT8 DevAddr,\r
- IN UINT8 EndPoint,\r
- OUT UINT8 *Toggle\r
+ IN USB_HC_DEV *Uhc,\r
+ IN UINT8 DevAddr,\r
+ IN UINT8 EndPoint,\r
+ OUT UINT8 *Toggle\r
);\r
\r
-\r
/**\r
Release all the asynchronous transfers on the lsit.\r
\r
**/\r
VOID\r
UhciFreeAllAsyncReq (\r
- IN USB_HC_DEV *Uhc\r
+ IN USB_HC_DEV *Uhc\r
);\r
\r
-\r
/**\r
Interrupt transfer periodic check handler.\r
\r
VOID\r
EFIAPI\r
UhciMonitorAsyncReqList (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
);\r
\r
#endif\r