/** @file\r
Private Header file for Usb Host Controller PEIM\r
\r
-Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
\r
#include <Ppi/UsbController.h>\r
#include <Ppi/UsbHostController.h>\r
+#include <Ppi/IoMmu.h>\r
+#include <Ppi/EndOfPeiPhase.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/PeimEntryPoint.h>\r
typedef struct {\r
UINTN Signature;\r
PEI_USB_HOST_CONTROLLER_PPI UsbHostControllerPpi;\r
+ EDKII_IOMMU_PPI *IoMmu;\r
EFI_PEI_PPI_DESCRIPTOR PpiDescriptor;\r
+ //\r
+ // EndOfPei callback is used to stop the UHC DMA operation\r
+ // after exit PEI phase.\r
+ //\r
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;\r
\r
UINT32 UsbHostControllerBaseAddress;\r
FRAMELIST_ENTRY *FrameListEntry;\r
} USB_UHC_DEV;\r
\r
#define PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS(a) CR (a, USB_UHC_DEV, UsbHostControllerPpi, USB_UHC_DEV_SIGNATURE)\r
+#define PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY(a) CR (a, USB_UHC_DEV, EndOfPeiNotifyList, USB_UHC_DEV_SIGNATURE)\r
\r
/**\r
Submits control transfer to a target USB device.\r
@param DevAddr Device address.\r
@param Endpoint Endpoint number.\r
@param DeviceSpeed Device Speed.\r
- @param DevRequest Device reuquest.\r
+ @param DevRequest CPU memory address of request structure buffer to transfer.\r
+ @param RequestPhy PCI memory address of request structure buffer to transfer.\r
@param RequestLen Request length.\r
@param PtrTD TD_STRUCT generated.\r
\r
IN UINT8 Endpoint,\r
IN UINT8 DeviceSpeed,\r
IN UINT8 *DevRequest,\r
+ IN UINT8 *RequestPhy,\r
IN UINT8 RequestLen,\r
OUT TD_STRUCT **PtrTD\r
);\r
@param UhcDev The UHCI device.\r
@param DevAddr Device address.\r
@param Endpoint Endpoint number.\r
- @param PtrData Data buffer.\r
+ @param PtrData CPU memory address of user data buffer to transfer.\r
+ @param DataPhy PCI memory address of user data buffer to transfer.\r
@param Len Data length.\r
@param PktID PacketID.\r
@param Toggle Data toggle value.\r
IN UINT8 DevAddr,\r
IN UINT8 Endpoint,\r
IN UINT8 *PtrData,\r
+ IN UINT8 *DataPhy,\r
IN UINT8 Len,\r
IN UINT8 PktID,\r
IN UINT8 Toggle,\r
IN MEMORY_MANAGE_HEADER *FreeMemoryHeader\r
);\r
\r
+/**\r
+ Map address of request structure buffer.\r
+\r
+ @param Uhc The UHCI device.\r
+ @param Request The user request buffer.\r
+ @param MappedAddr Mapped address of request.\r
+ @param Map Identificaion of this mapping to return.\r
+\r
+ @return EFI_SUCCESS Success.\r
+ @return EFI_DEVICE_ERROR Fail to map the user request.\r
+\r
+**/\r
+EFI_STATUS\r
+UhciMapUserRequest (\r
+ IN USB_UHC_DEV *Uhc,\r
+ IN OUT VOID *Request,\r
+ OUT UINT8 **MappedAddr,\r
+ OUT VOID **Map\r
+ );\r
+\r
+/**\r
+ Map address of user data buffer.\r
+\r
+ @param Uhc The UHCI device.\r
+ @param Direction Direction of the data transfer.\r
+ @param Data The user data buffer.\r
+ @param Len Length of the user data.\r
+ @param PktId Packet identificaion.\r
+ @param MappedAddr Mapped address to return.\r
+ @param Map Identificaion of this mapping to return.\r
+\r
+ @return EFI_SUCCESS Success.\r
+ @return EFI_DEVICE_ERROR Fail to map the user data.\r
+\r
+**/\r
+EFI_STATUS\r
+UhciMapUserData (\r
+ IN USB_UHC_DEV *Uhc,\r
+ IN EFI_USB_DATA_DIRECTION Direction,\r
+ IN VOID *Data,\r
+ IN OUT UINTN *Len,\r
+ OUT UINT8 *PktId,\r
+ OUT UINT8 **MappedAddr,\r
+ OUT VOID **Map\r
+ );\r
+\r
+/**\r
+ Provides the controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Operation Indicates if the bus master is going to read or write to system memory.\r
+ @param HostAddress The system memory address to map to the PCI controller.\r
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
+ that were mapped.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuMap (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN EDKII_IOMMU_OPERATION Operation,\r
+ IN VOID *HostAddress,\r
+ IN OUT UINTN *NumberOfBytes,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ );\r
+\r
+/**\r
+ Completes the Map() operation and releases any corresponding resources.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+**/\r
+VOID\r
+IoMmuUnmap (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN VOID *Mapping\r
+ );\r
+\r
+/**\r
+ Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
+ OperationBusMasterCommonBuffer64 mapping.\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the\r
+ allocated range.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuAllocateBuffer (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN UINTN Pages,\r
+ OUT VOID **HostAddress,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ );\r
+\r
+/**\r
+ Frees memory that was allocated with AllocateBuffer().\r
+\r
+ @param IoMmu Pointer to IOMMU PPI.\r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+**/\r
+VOID\r
+IoMmuFreeBuffer (\r
+ IN EDKII_IOMMU_PPI *IoMmu,\r
+ IN UINTN Pages,\r
+ IN VOID *HostAddress,\r
+ IN VOID *Mapping\r
+ );\r
+\r
+/**\r
+ Initialize IOMMU.\r
+\r
+ @param IoMmu Pointer to pointer to IOMMU PPI.\r
+\r
+**/\r
+VOID\r
+IoMmuInit (\r
+ OUT EDKII_IOMMU_PPI **IoMmu\r
+ );\r
+\r
#endif\r
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