MdeModulePkg/XhciDxe: Add access xHCI Extended Capabilities Pointer

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.c

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
index 381d7a9536b9be1abfc4bad08c8ab286f4f77e90..c05431ff30ec161b90ede2d1284c133561e4f02e 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
@@ -399,24 +399,31 @@ XhcGetRootHubPortStatus (
 \r
   //\r
   // According to XHCI 1.1 spec November 2017,\r
-  // bit 10~13 of the root port status register identifies the speed of the attached device.\r
+  // Section 7.2 xHCI Support Protocol Capability\r
   //\r
-  switch ((State & XHC_PORTSC_PS) >> 10) {\r
-    case 2:\r
-      PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
-      break;\r
+  PortStatus->PortStatus = XhcCheckUsbPortSpeedUsedPsic (Xhc, ((State & XHC_PORTSC_PS) >> 10));\r
+  if (PortStatus->PortStatus == 0) {\r
+    //\r
+    // According to XHCI 1.1 spec November 2017,\r
+    // bit 10~13 of the root port status register identifies the speed of the attached device.\r
+    //\r
+    switch ((State & XHC_PORTSC_PS) >> 10) {\r
+      case 2:\r
+        PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
+        break;\r
 \r
-    case 3:\r
-      PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;\r
-      break;\r
+      case 3:\r
+        PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;\r
+        break;\r
 \r
-    case 4:\r
-    case 5:\r
-      PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;\r
-      break;\r
+      case 4:\r
+      case 5:\r
+        PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;\r
+        break;\r
 \r
-    default:\r
-      break;\r
+      default:\r
+        break;\r
+    }\r
   }\r
 \r
   //\r
@@ -1826,6 +1833,8 @@ XhcCreateUsbHc (
   Xhc->ExtCapRegBase     = ExtCapReg << 2;\r
   Xhc->UsbLegSupOffset   = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);\r
   Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);\r
+  Xhc->Usb2SupOffset     = XhcGetSupportedProtocolCapabilityAddr (Xhc, XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB2);\r
+  Xhc->Usb3SupOffset     = XhcGetSupportedProtocolCapabilityAddr (Xhc, XHC_SUPPORTED_PROTOCOL_DW0_MAJOR_REVISION_USB3);\r
 \r
   DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));\r
   DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));\r
@@ -1835,6 +1844,8 @@ XhcCreateUsbHc (
   DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));\r
   DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));\r
   DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));\r
+  DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb2SupOffset 0x%x\n", Xhc->Usb2SupOffset));\r
+  DEBUG ((DEBUG_INFO, "XhcCreateUsb3Hc: Usb3SupOffset 0x%x\n", Xhc->Usb3SupOffset));\r
 \r
   //\r
   // Create AsyncRequest Polling Timer\r