MdeModulePkg/XhciDxe: Check timeout URB again after stopping endpoint

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.h

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
index 06cc73c7cbbe01476b2c0bb74a81ddd9d8ff46d7..76daaff4a4e57668bcd048b6cb1f9917a2f041e6 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h
@@ -2,7 +2,7 @@
 \r
   Provides some data structure definitions used by the XHCI host controller driver.\r
 \r
-Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -61,6 +61,11 @@ typedef struct _USB_DEV_CONTEXT      USB_DEV_CONTEXT;
 //\r
 #define XHC_RESET_TIMEOUT            (1000)\r
 //\r
+// TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.\r
+// The unit is microsecond, setting it as 10ms.\r
+//\r
+#define XHC_RESET_RECOVERY_DELAY     (10 * 1000)\r
+//\r
 // XHC async transfer timer interval, set by experience.\r
 // The unit is 100us, takes 1ms as interval.\r
 //\r
@@ -238,6 +243,7 @@ struct _USB_XHCI_INSTANCE {
   UINT64                    *DCBAA;\r
   VOID                      *DCBAAMap;\r
   UINT32                    MaxSlotsEn;\r
+  URB                       *PendingUrb;\r
   //\r
   // Cmd Transfer Ring\r
   //\r