\r
Provides some data structure definitions used by the XHCI host controller driver.\r
\r
-Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
//\r
#define XHC_RESET_TIMEOUT (1000)\r
//\r
+// TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.\r
+// The unit is microsecond, setting it as 10ms.\r
+//\r
+#define XHC_RESET_RECOVERY_DELAY (10 * 1000)\r
+//\r
// XHC async transfer timer interval, set by experience.\r
// The unit is 100us, takes 1ms as interval.\r
//\r
#define INT_INTER_ASYNC 4\r
\r
//\r
-// Iterate through the doule linked list. This is delete-safe.\r
+// Iterate through the double linked list. This is delete-safe.\r
// Don't touch NextEntry\r
//\r
#define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \\r
UINT64 *DCBAA;\r
VOID *DCBAAMap;\r
UINT32 MaxSlotsEn;\r
+ URB *PendingUrb;\r
//\r
// Cmd Transfer Ring\r
//\r
);\r
\r
/**\r
- Stop this driver on ControllerHandle. Support stoping any child handles\r
+ Stop this driver on ControllerHandle. Support stopping any child handles\r
created by this driver.\r
\r
@param This Protocol instance pointer.\r