# It implements the interfaces of monitoring the status of all ports and transferring\r
# Control, Bulk, Interrupt and Isochronous requests to those attached usb LS/FS/HS/SS devices.\r
#\r
-# Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
#\r
# The following information is for reference only and not required by the build tools.\r
#\r
-# VALID_ARCHITECTURES = IA32 X64 IPF EBC ARM AARCH64\r
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r
#\r
# DRIVER_BINDING = gXhciDriverBinding\r
# COMPONENT_NAME = gXhciComponentName\r
XhciReg.c\r
XhciSched.c\r
UsbHcMem.c\r
- UsbHcMem.h \r
+ UsbHcMem.h\r
ComponentName.c\r
ComponentName.h\r
Xhci.h\r